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                        sample_wave
                        
                          可以产生8比特的采样波形,非常不错的VHDL程序(Sampling can produce 8-bit waveform, very good VHDL program)                         
                            - 2010-10-12 20:03:07下载
- 积分:1
 
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                        27个FPGA实例源代码
                        
                          一些对初学者比较实用的源码,ASK,PSK,FSK调制解调(Some of the more practical source code for beginners)                         
                            - 2020-12-10 16:29:20下载
- 积分:1
 
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                        802.11a的基带检测
                        
                          802.11a的基带分组检测的verilog实现,其使用了分组检测的优化算法——延时相关保存算法,具有由于的检测性能。                         
                            - 2022-03-26 03:59:22下载
- 积分:1
 
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                        4x4-Keypad
                        
                          fpga的一个小程序用于3s500e 4*4键盘模块(fpga is a small program used 3s500e 4* 4 keyboard module)                         
                            - 2013-07-21 11:41:36下载
- 积分:1
 
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                        vhdl_lms
                        
                          vhdl 语言实现的lms算法的自适应滤波器 两种实现方式 包括改进(VHDL language lms algorithm adaptive filter implemented in two ways including improved)                         
                            - 2012-04-26 18:15:02下载
- 积分:1
 
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                        rc6_decryption
                        
                          rc6 algorithm designed based on verilog and is verified                         
                            - 2020-12-01 21:59:28下载
- 积分:1
 
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                        HDB3
                        
                          HDB3 encoder and decoder(HDB3 decoer)                         
                            - 2020-11-11 12:29:45下载
- 积分:1
 
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                        emifa_ram
                        
                          FPGA与DSP的EMIF通信,EMIF的RAM这方面相应的程序(FPGA and DSP EMIF communication)                         
                            - 2020-12-01 15:49:26下载
- 积分:1
 
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                        gtwizard_254_127_ex_1113_3
                        
                          配置GTH ip的例子工程,选用7 series 芯片的GTH 113quad的四个通道,在程序中每个链路利用自己的恢复时钟进行数据解码,所以四个通道可以各自独立运行;成功工作在2.54Gb/s的链路状态,长时间(>24小时)的测试,误码率一直为0.(The GTH ip example project is configured with four channels of the GTH 113quad of the 7 series chip. Each link in the program uses its own recovery clock for data decoding, so the four channels can operate independently; the successful operation is at 2.54Gb/ The link state of s, long time (>24 hours) test, the bit error rate has been 0.)                         
                            - 2019-06-17 21:33:56下载
- 积分:1
 
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                        iifftt
                        
                          说明:  verilog实现的fft算法,其中还有ifft算法(FFT algorithm based on Verilog)                         
                            - 2020-09-20 00:57:52下载
- 积分:1