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uIP运行于8位
uIP运行于8位-16位单片机上TCPIP协议源码0.9 我自己做过的 很好的 希望与大家爱好者分享-Application of ulP runs on eight 16-bit microcontroller agreement on the source of 0.9 TCPIP I done good and we hope to share lovers
- 2022-02-05 17:52:58下载
- 积分:1
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ADuc812 the ADC conversion process, tested no problem
ADuc812的ADC转换程序,经测试没有问题-ADuc812 the ADC conversion process, tested no problem
- 2022-03-20 09:04:51下载
- 积分:1
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Display a color pallet for color RGB definations
Display a color pallet for color RGB definations
- 2022-07-22 22:07:31下载
- 积分:1
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LED数码管的简单控制程序,7彩变化。有按键可以选择模式。
LED数码管的简单控制程序,7彩变化。有按键可以选择模式。-LED digital tube simple control procedures, 7 color change. Button has the option mode.
- 2023-04-23 03:25:02下载
- 积分:1
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LCD IconEditor edit graphic creat source code
LCD IconEditor edit graphic creat source code
- 2022-04-15 09:39:40下载
- 积分:1
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这是一个LED液晶显示的程序...有多个接口..可以用的我用过
这是一个LED液晶显示的程序...有多个接口..可以用的我用过-This is a LED LCD procedures ... .. a number of interface can be used with the I
- 2023-04-28 06:05:03下载
- 积分:1
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设置窗口布局的几种手段,可以对比不同显示效果
设置窗口布局的几种手段,可以对比不同显示效果-Settings window layout of several means, you can compare different display
- 2022-03-03 06:23:52下载
- 积分:1
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with Parallel Communications, only this simulation software hexadecimal display...
用并口通信时,只需发送仿真软件的十六进制显示窗口的第四个字节后的所有数据。
如:清全屏的十六进制显示窗口是55AA0001434C42,采用并口通信时只需发送434C42-with Parallel Communications, only this simulation software hexadecimal display window of words, after the data. Such as : a full-hexadecimal 55AA0001434C42 show window is used and only parallel communication sent 434C42
- 2022-03-21 15:04:56下载
- 积分:1
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这是用于proteus仿真软件的程序源码,当然也可以在单片机上用,请努力学习嵌入式吧...
这是用于proteus仿真软件的程序源码,当然也可以在单片机上用,请努力学习嵌入式吧-This is for the Proteus simulation software program source code, of course, can also be used in SCM, please study hard embedded bar
- 2022-03-06 22:13:58下载
- 积分:1
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This article describes two kinds of sub
本文介绍了两种分频系数为整数或半整数的可控分频器的设计方法。其中之一可以实现50%的奇数分频。利用VHDL语言编程,并用QUARTERS||4.0进行仿真,用 FPGA 芯片实现。
关键词:半整数,可控分频器,VHDL, FPGA
-This article describes two kinds of sub-frequency coefficient is an integer or half-integer divider controllable design method. One of them can achieve 50 of the odd-numbered sub-frequency. The use of VHDL language programming, and QUARTERS | | 4.0 simulation, using FPGA chip. Key words: semi-integer, controllable divider, VHDL, FPGA
- 2022-02-04 03:15:26下载
- 积分:1