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这个是IEEE802.15.4的英文版 ，我找了好久才找到的，希望能给开发zigbee的同行一写参考...
这个是IEEE802.15.4的英文版 ，我找了好久才找到的，希望能给开发zigbee的同行一写参考-This is IEEE802.15.4 in English, I am looking for a long time to find, and we hope to give their counterparts in developing a written reference to zigbee
- 2022-05-14 12:03:01下载
- 积分：1
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a document management, lt; Zhuge Liang diary. Gt;
一个管理文件,-a document management, lt; Zhuge Liang diary. Gt;
- 2022-11-04 17:15:03下载
- 积分：1
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一个很好的入门指南，打家里可以的
入门指南的一个很好的例子，玩家里可以玩小s
- 2022-03-30 08:42:17下载
- 积分：1
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这是一本很好的语言程序设计电子书，特别拿出来与大家共享。
第二部分...
这是一本很好的语言程序设计电子书，特别拿出来与大家共享。
第二部分-This is a very good program design language e-books, especially out to share with you. Part II
- 2022-04-01 19:31:43下载
- 积分：1
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算法精华，学习算法使用，据说是目前最全的ACM竞赛的算法大全，不看会后悔的哦...
算法精华，学习算法使用，据说是目前最全的ACM竞赛的算法大全，不看会后悔的哦-Algorithm is the essence of learning algorithm to use, is said to be the most full-race of the ACM algorithm Daquan, oh do not look would regret
- 2022-07-09 02:57:10下载
- 积分：1
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Some commonly used C
一些常用的C语言程序，里面包括一些常用的C代码。。希望对大家有所帮助-Some commonly used C-language program, which includes some commonly used C code. . Would like to help everyone
- 2022-05-23 06:33:24下载
- 积分：1
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LatticeXP_V1.zip 官方资料 LatticeXP_V1.zip 官方资料
LatticeXP_V1.zip 官方资料 LatticeXP_V1.zip 官方资料-LatticeXP_V1.zip official information LatticeXP_V1.zip official information LatticeXP_V1.zip official information
- 2022-04-29 03:39:41下载
- 积分：1
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一本详细介绍Makefile的格式，语法，包含函数，变量和库等相关操作的中文书籍。非常适合嵌入式开发...
一本详细介绍Makefile的格式，语法，包含函数，变量和库等相关操作的中文书籍。非常适合嵌入式开发-the book includes the discription of the makefile s format,varible, function,library etc . it is suitable for the linux developers and emmbed developers
- 2022-03-13 15:44:46下载
- 积分：1
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FPGA pipelined designs on paper This work investigates the use of very deep pipe...
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
compliant 32-bit floating-point multiplier. We show how to
write VHDL cells that implement such approach, and how
the array multiplier architecture was adapted. Synthesis
and simulation were performed for Altera Apex20KE
devices, although the VHDL code should be portable to
other devices. For this family, a 16 bit integer multiplier
achieves a frequency of 266MHz, while the floating point
unit reaches 235MHz, performing 235 MFLOPS in an
FPGA. Additional cells are inserted to synchronize data,
what imposes significant area penalties. This and other
considerations to apply the technique in real designs are
also addressed.-FPGA pipelined designs on paper This work invest
- 2022-11-28 12:05:03下载
- 积分：1
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美河提供MFC应用程序在.NET框架下的扩展
美河提供MFC应用程序在.NET框架下的扩展-River for the U.S. MFC application procedures.NET framework expansion
- 2023-03-31 22:35:07下载
- 积分：1
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