登录
首页 » VHDL » SPI接口的实现以及对外设的读写操作,其中包扩了几种工作方式,同时可以读取外设的版本号,传输速率可以达到2Mbps...

SPI接口的实现以及对外设的读写操作,其中包扩了几种工作方式,同时可以读取外设的版本号,传输速率可以达到2Mbps...

于 2022-03-19 发布 文件大小:1.05 kB
0 120
下载积分: 2 下载次数: 1

代码说明:

SPI接口的实现以及对外设的读写操作,其中包扩了几种工作方式,同时可以读取外设的版本号,传输速率可以达到2Mbps-SPI interface implementation, as well as read and write operations on the peripheral, which extended several work packages at the same time can read the version number of peripherals, transfer rate up to 2Mbps

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • HDLC接口协议的FPGA实现使用verilog
    HDLC接口协议的FPGA实现使用verilog-design of HDLC
    2022-06-02 20:47:21下载
    积分:1
  • vhdl实现24小时计数器,方法简单实用。 仿真环境MAXPLUS
    用vhdl实现24小时计数器,方法简单实用。 仿真环境MAXPLUS--use VHDL to achieve 24-hour counter, simple and practical method. Simulation environment Segments-
    2022-03-24 12:46:20下载
    积分:1
  • This tutorial presents an introduction to Altera’s Nios R II processor, which...
    This tutorial presents an introduction to Altera’s Nios R II processor, which is a soft processor that can be in- stantiated on an Altera FPGA device. It describes the basic architecture of Nios II and its instruction set. The NiosII processor and its associated memory and peripheral components are easily instantiated by using Altera’s SOPCBuilder in conjuction with the Quartus R II software.
    2023-06-21 11:25:02下载
    积分:1
  • bits FIFO with synchronizer. Pass the sy nthesis using Synopsys tools
    32bits FIFO with synchronizer. pass the synthesis using Synopsys tools-bits FIFO with synchronizer. Pass the sy nthesis using Synopsys tools
    2023-01-08 07:50:03下载
    积分:1
  • mux21a
    在VHDL结构体中用于描述逻辑功能和电路结构的语句分为顺序语句和并行语句两部分,顺序语句的执行方式十分类似于普通软件语言的程序执行方式,都是按照语句的前后排列方式顺序执行的。(VHDL structure in the body used to describe the logic function and circuit structure of the order of statements and expressions are divided into two parts in parallel statement, modalities for the implementation of the order of statement is very similar to ordinary language software program implementation, are in accordance with the statements before and after the arrangement of the order implementation.)
    2008-12-24 18:25:20下载
    积分:1
  • Datasheets
    关于ALTERA DE2板上的文档资料,包括应用实例,用户文档和板上常用器件的技术文档(datasheets of ALTERA DE2)
    2010-03-10 10:14:08下载
    积分:1
  • CV_FPGA_to_HPS_Bridge_Design_Example
    FPGA通过AXI总线传输数据给ARM,ARM使用DMA方式接收数据!(FPGA to ARM Bridge design example)
    2020-12-01 20:49:25下载
    积分:1
  • mini_cpu_verilog
    用verilog写的简单的CPU,有详细注释(Use verilog to write a simple CPU, with detailed notes)
    2011-07-16 09:20:27下载
    积分:1
  • dds
    基于单片机的DDS信号发生器,具有DDS思想的单片机编程。。。(Sunplus based DDS signal generator with DDS thinking microcontrollers. . .)
    2011-09-02 15:39:02下载
    积分:1
  • gpmc_fpga
    实现arm与fpga之间通过gpmc总线通信(the device of fpga)
    2015-10-27 16:44:25下载
    积分:1
  • 696516资源总数
  • 106415会员总数
  • 3今日下载