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vhdl交通灯实验报告
vhdl交通灯实验报告-VHDL traffic lights Experimental Report
- 2022-02-13 04:55:13下载
- 积分：1
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done, would not have introduced the document on the bar, IEEE1364 standard (open...
做EDA的，就不用介绍这个文件了吧，IEEE1364标准（开放）。-done, would not have introduced the document on the bar, IEEE1364 standard (open).
- 2022-03-25 09:59:57下载
- 积分：1
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URISC 处理器由数据单元和控制单元组成。数据单元中包含保存运算数据和运算结果的数据寄存器，也包括用来完成数据运算的组合逻辑电路单元。控制单元用来产生控制信号...
URISC 处理器由数据单元和控制单元组成。数据单元中包含保存运算数据和运算结果的数据寄存器，也包括用来完成数据运算的组合逻辑电路单元。控制单元用来产生控制信号序列，以决定何时进行何种数据运算。控制单元要从数据单元得到条件信号，以决定继续进行那些数据运算，数据单元要产生输出信号，数据运算状态等有用信息。-URISC processor by the data unit and control unit. Data unit included in the preservation of data and computing the results of computing the data register, but also data used to complete a combination of computing logic circuit unit. Control unit used to generate the control signal sequence, to determine when and what data computing. Control unit from the data unit received condition signal to determine the continuation of the data computation, data unit to produce output signals, data, such as computing the state of useful information.
- 2022-03-24 14:43:33下载
- 积分：1
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VerilogHDL
本书简要介绍了Verilog硬件描述语言的基础知识，包括语言的基本内容和基本结构 ，以及利用该语言在各种层次上对数字系统的建模方法。书中列举了大量实例，帮助读者掌握语言本身和建模方法，对实际数字系统设计也很有帮助。本书是Verilog HDL的初级读本，适用于作为计算机、电子、电气及自控等专业相关课程的教材，也可供有关的科研人员作为参考书。(This book briefly introduces the Verilog hardware description language basics, including basic elements of language and basic structure, and the use of the language at various levels on the digital system modeling. The book lists a large number of examples to help readers master the language itself and the modeling of the actual digital system design is also helpful. Verilog HDL book is a primer for a computer, electronic, electrical and automatic control and other specialized courses related to materials, but also for the researchers as a reference.)
- 2010-05-11 19:54:29下载
- 积分：1
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ap01
一個紅外線感測電路的設計，是經由opa來設計。(An infrared sensing circuit design, is designed by opa.)
- 2011-10-19 14:22:24下载
- 积分：1
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本例为ADC0809接口电路VHDL程序原代码
本例为ADC0809接口电路VHDL程序原代码-The ADC0809 Interface Circuit Example for VHDL program source code
- 2022-05-19 18:28:38下载
- 积分：1
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frequency divider
FPGA对系统50M时钟进行分频。FPGA最基本功能基础(FPGA Verilog program, key detection, program jitter elimination, jitter elimination, delay detection keys)
- 2019-04-27 23:35:12下载
- 积分：1
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本代码实现了全加器功能，适合初学者学习
本代码实现了全加器的功能，可供初学者学习-This code implements a full adder functions, for beginners to learn
- 2022-03-09 20:15:10下载
- 积分：1
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这是兼容的CPU 8051 VHDL语言，它不是一个侵权。上帝保佑！
这是兼容的8051 VHDL CPU实现，应该不算侵权吧。 上帝保佑！-This is compatible CPU 8051 VHDL, it is not a tort. God bless!
- 2022-10-01 01:00:03下载
- 积分：1
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DAC0832VHDL
DAC0832 接口电路程序.功能：产生频率为762.9Hz的锯齿波DAC0832VHDL程序与仿真(DAC0832 procedures interface circuit. Functions: generate the sawtooth frequency of 762.9Hz and simulation procedures DAC0832VHDL)
- 2020-11-28 12:59:31下载
- 积分：1
