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clock_smg
自己做的数码管显示的时钟 一个非常简单的FPGA时钟 用累加做的(To do their own digital display clock of the FPGA clock is a very simple to do with the cumulative)
- 2011-09-27 21:07:54下载
- 积分:1
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CLOCK1027
设计了一个电子时钟,功能包括定点报时,设置闹钟,校时等(Designed an electronic clock, features include fixed-point timekeeping, setting alarms, school hours, etc.)
- 2018-07-01 18:11:41下载
- 积分:1
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Serial to parallel conversion code
用于串行到并行数据转换器的VHDL代码;当输入数据是串行的时,该代码是用于许多应用程序的位到字节转换的VHDL代码形成代码使用基于FPGA的LUT和D-RAM来存储数据,然后用时钟推送字节对齐的数据。
- 2022-08-08 20:52:36下载
- 积分:1
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FPGA-implementation
重点介绍了双线性插值算法和该方法的F P GA硬件实现
方法, 包括图像数据缓冲单元、 插值系数生成单元以及插值计算单元等。(Highlights the bilinear interpolation algorithm and the method of F P GA hardware
The method includes an image data buffer unit, the interpolation coefficient generating unit and an interpolation computing unit and the like.)
- 2021-05-14 18:30:02下载
- 积分:1
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2ASK
2ask调制与解调的源代码,经过测试可用(2ask modulation and demodulation source code is available, tested)
- 2012-12-09 21:27:49下载
- 积分:1
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uart_byte_rx
libero soc工程,实现通过串口接收到单字节数据后并返回发送给上位机(Libero SOC project, which realizes receiving single byte data through serial port and sending it back to host computer)
- 2020-06-21 09:20:01下载
- 积分:1
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fdd
按键消抖,对时钟沿计数决定是否将bin值给内部的按键值。(Debounced buttons, whether on the edge of the clock count within the bin value to the key value.)
- 2011-11-08 14:34:08下载
- 积分:1
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cpu-maxplus
MaxplusII编写的简易cpu,可实现简单加减法等操作(MaxplusII summary prepared by the cpu can realize simple addition and subtraction, etc)
- 2007-06-08 17:55:10下载
- 积分:1
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hard
在Quartus中,利用FPGA例化的存储器实现程序的BOOTLOADER的搬移(In Quartus, the use of FPGA case of memory to achieve the program' s move BOOTLOADER)
- 2020-09-27 20:17:46下载
- 积分:1
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俄罗斯方块(Xilinx版)
说明: 用verilog语言开发俄罗斯方块小游戏(Developing Tetris game with Verilog language)
- 2020-11-27 08:47:38下载
- 积分:1