-
CV_FPGA_to_HPS_Bridge_Design_Example
FPGA通过AXI总线传输数据给ARM,ARM使用DMA方式接收数据！(FPGA to ARM Bridge design example)
- 2020-12-01 20:49:25下载
- 积分：1
-
24_Timer
使用Verilog编写的24位定时器，具有apb 总线接口，可以设置工作方式和计数初值。(The 24-bit timer written by Verilog has APB bus interface, which can set working mode and count initial value.)
- 2021-04-27 21:38:44下载
- 积分：1
-
AD9826-verilog
使用Verilog编写的ad9826的控制模块(the module of ad9826 with verilog)
- 2016-05-09 14:45:37下载
- 积分：1
-
I2C-AT24C02
I2C总线芯片AT24C02程序设计 C++编程(I2C bus AT24C02 chip program design)
- 2013-05-27 15:01:08下载
- 积分：1
-
SignalTap-II-instruction
对于学习FPGA的同学来说仿真是必不可少的流程 但是仿真的方法signal tap是必须掌握的(For students learning FPGA simulation is an essential process but the simulation method tap signal is a must)
- 2016-04-18 16:28:51下载
- 积分：1
-
altera实现的UDP协议（Verilog实现）
Verilog实现的udp协议，比网络上的资源更加丰富，想要了解altera tse相关源码，就大胆下载吧，给你想要的一切。
- 2022-04-27 08:25:46下载
- 积分：1
-
Micron_SDRAM_DDR2Simulation_model_Verilog
DDR2 SDRAM仿真模型，适合于ModelSim下工作，请先阅读readme(DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.)
- 2020-10-29 17:49:57下载
- 积分：1
-
tlk2711test
用verilog语言实现了tlk2711serdes芯片的高速串行功能，包含工程与仿真文件，亲测可用(Using Verilog language to achieve a high-speed serial tlk2711serdes chip function, including the project and the simulation file, pro test available)
- 2020-12-29 23:39:00下载
- 积分：1
-
my_kmp_matching
说明： KMP算法的Verilog HDL实现，模式串从模块的外部输入，计算next函数，然后进行KMP匹配。有仿真。环境为Quartus II 8.0 Web Edition。(Verilog HDL implementation KMP algorithm, pattern string from the module' s external input, calculate next function, then KMP matching. A simulation. Environment for the Quartus II 8.0 Web Edition.)
- 2011-03-14 09:28:01下载
- 积分：1
-
Dac714
dac714的控制程序，包括spi数据通信，转换控制(dac714 control procedures, including the spi data communications, switching control)
- 2011-05-18 09:13:59下载
- 积分：1
