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TR0114 VHDL Language Reference

于 2022-03-22 发布 文件大小:644.65 kB
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TR0114 VHDL Language Reference

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  • test1
    利用matlab,对偏振控制器进行仿真,最终在邦加球上进行显示(Using matlab, simulation of the polarization controller eventually be displayed on the Poincare Sphere)
    2013-04-07 10:42:15下载
    积分:1
  • reader
    实现verilog读写txt文件,从sut.txt从读取数据,进行操作后,写入out.txt(Realize verilog read and write txt file)
    2020-11-15 21:29:41下载
    积分:1
  • VHDL_COUNTING 与 4 使脉冲和使用 3 按钮了,下来,停止 (Mạch đếm với 4 xung ENA sử dụng 3 nút nhấn lên,xuống và dừng l
    VHDL_COUNTING 与 4 使脉冲和使用 3 按钮了,下来,停止 (Mạch đếm với 4 xung ENA sử dụng 3 nút nhấn lên,xuống và dừng lại)
    2022-03-19 05:46:27下载
    积分:1
  • OQPSK_fading
    OQPSK在AWGN和频率选择性衰落信道中的仿真(OQPSK the AWGN and frequency selective fading channel simulation)
    2021-04-05 21:49:03下载
    积分:1
  • 48_4.12
    网络通信中的MII接口 通常将4位nibble数据送出,此程序将4位数据组合成8位数据并行输出(8比特==1个字节)。。完全可用 同时包含84转换(The MII network interface usually sent four nibble data, this procedure will be 4-bit data into 8-bit parallel output data (8 bits == 1 byte). . Completely available at the same time contains 84 conversion)
    2009-04-21 13:43:45下载
    积分:1
  • Code-Verilog
    this is code verilog
    2012-05-09 22:02:56下载
    积分:1
  • pc_cfr_test_v3_1c
    一个关于降低现代通信系统中高峰均比信号的matlab算法,对于研究数字预失真基于FPGA实现的有一定作用!(A modern communication system on the lower than the peak signal matlab algorithm for FPGA-based study of digital pre-distortion to achieve a certain effect! )
    2011-07-07 22:01:17下载
    积分:1
  • ComunicationRealizationBetweenFPGAandSerialInterfa
    说明:  杜晓斌和陈兴文-FPGA和单片机串行通信接口的实现一文提出了FPGA与单片机实现数据串行通信的解决方案。在通信过程中完全遵守RS232 协议,给出了发送模块的vhdl源代码。 (杜晓斌and陈兴文-FPGA single-chip serial communication interface and the realization of a text proposed by the FPGA and MCU serial data communications solutions. In the communication process in full compliance with the RS232 protocol is given to send the VHDL source code modules.)
    2008-11-18 15:41:34下载
    积分:1
  • altfp_matrix_mult
    浮点数 矩阵乘法模块 verilog语言编写 可直接调用(Floating-point matrix multiplication module can directly call verilog language)
    2013-12-18 15:08:36下载
    积分:1
  • PWM
    verilogHDL语言编写,简单的FPGA脉冲程序,初学者必备。(verilogHDL language, a simple FPGA pulse program, beginners must.)
    2012-12-27 11:54:45下载
    积分:1
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