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手把手教你学FPGA 语法篇
编程规范是重中之重，带你书写良好的变成习惯(It is used to measure noise and detect road noise pollution. It is accurate and has good effect.)
- 2018-03-10 20:49:51下载
- 积分：1
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SELF CHECKING DUAL PORT RAM
自检双端口ram自动验证特定地址的数据是否正确
- 2022-03-19 13:16:57下载
- 积分：1
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txt_util
VHDL库，仿真时使用的，包括打印，类型转换等实用的操作(Practical operation VHDL library, using simulation, including print, type conversion, etc.)
- 2014-05-23 13:07:31下载
- 积分：1
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AHBtoAPB
说明： amba总线桥:ahb to asb!verilog hdl文档加代码，非常全，soc(amba bus bridge: ahb to asb! verilog hdl code for the document plus a very full, soc)
- 2021-01-05 03:48:55下载
- 积分：1
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verilog滤波器仿真
verilog程序仿真滤波器
16阶 运用加法器和乘法器 40KHZ
16位并入并出
- 2022-03-18 13:07:36下载
- 积分：1
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Vivado基础实验
通过用vivado完成一个流水灯项目手把手教你如何使用vivado，内容十分详细。(Using vivado to complete a running light project, you can learn how to use vivado by hand. The content is very detailed.)
- 2018-12-06 16:14:45下载
- 积分：1
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gtx_aurora_zc706_example
Aurora 8B/10B协议是Xilinx公司针对高速传输开发的一种可裁剪的轻量级链路层协议，通过一条或多条串行链路实现两设备间的数据传输。协议Aurora协议可以支持流和帧两种数据传输模式，以及全双工、单工等数据通信方式。(The Aurora 8B / 10B protocol is a tailor-made lightweight link layer protocol developed by Xilinx for high-speed transmission that enables data transfer between two devices over one or more serial links. Protocol Aurora protocol can support two data transfer modes, stream and frame, as well as full-duplex, simplex and other data communications.)
- 2018-01-23 08:53:37下载
- 积分：1
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Synthesis_and_Fpga_Implementation_of_UAR
Synthesis and fpga implementation of UART
- 2018-12-03 14:06:02下载
- 积分：1
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cpsk_dpsk
数字通信系统相移键控CPSK信号和差分相移键控的调制与解调的VHDL代码(Phase shift keying digital communication system CPSK signals and differential phase-shift keying modulation and demodulation of the VHDL code for)
- 2009-11-06 16:11:03下载
- 积分：1
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ANALYSIS-OF-FULL-ADDER
DESCRIPTION OF FULL ADDER
- 2013-11-12 13:32:19下载
- 积分：1
