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cpu_easy
说明： ADD MOV MOVi SUB四指令cpu设计，qutartus，(Design of four-instruction CPU)
- 2019-05-13 11:44:49下载
- 积分：1
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5408A
The SPFD5408A, a 262144-color System-on-Chip (SoC) driver
LSI designed for small and medium sizes of TFT LCD display, is
capable of supporting up to 240xRGBx320 in resolution which can
be achieved by the designated RAM for graphic data. The
720-channel source driver has true 6-bit resolution, which
(The SPFD5408A, a 262144-color System-on-Chip (SoC) driver
LSI designed for small and medium sizes of TFT LCD display, is
capable of supporting up to 240xRGBx320 in resolution which can
be achieved by the designated RAM for graphic data. The
)
- 2012-07-16 17:09:15下载
- 积分：1
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msk_mod_demod
该程序实现最小频移键控信号的调制解调，经测试无误。(The program implements minimum shift keying signal modulation and demodulation, tested and correct.)
- 2013-10-14 23:02:39下载
- 积分：1
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一个用VerilogHDL语言编写的模6的二进制计数器
一个用VerilogHDL语言编写的模6的二进制计数器-a Verilog HDL language used in the preparation of the six-binary counter
- 2022-03-22 05:41:51下载
- 积分：1
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vhdl经典源代码――键盘接口设计，入门者必须掌握
vhdl经典源代码――键盘接口设计，入门者必须掌握-vhdl classical source code-- the keyboard interface design, beginners must master
- 2022-11-20 22:55:03下载
- 积分：1
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FPGA的发展
FPGA开发全攻略，工程师创新宝典，由张国斌等书写-FPGA development
- 2022-02-21 00:39:00下载
- 积分：1
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motor
步进电机驱动，32等级速度，带加减速度控制。verilog编写。(step motor driver,32 level speed.)
- 2020-12-09 16:29:19下载
- 积分：1
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Using-fpga-implementation-SDI
用fpga实现SDI（ xapp1014-xilinx-sdi）赛灵思原厂资料(Using fpga implementation SDI (xapp1014-xilinx-sdi) Xilinx original data)
- 2013-10-29 15:02:18下载
- 积分：1
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thesis
thesis for simple virus detection processor which is developed in xilinx
- 2015-02-18 23:51:11下载
- 积分：1
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pl_read_write_ps_ddr
说明： PL 和 PS 的高效交互是 zynq 7000 soc 开发的重中之重，常常需要将 PL 端的大量数据实时送到 PS 端处理，或者将 PS 端处理结果实时送到 PL 端处理，但是各种协议非常麻烦，灵活性也比较差，直接通过 AXI 总线来读写 PS 端 ddr 的数据，这里面涉及到 AXI4 协议，vivado 的 FPGA 调试等。(The efficient interaction between PL and PS is the top priority of zynq 7000 SoC development. We often need to send a large amount of data from PL to PS for real-time processing, or send the processing results from PS to pl for real-time processing. In general, we will think of using DMA for processing, but various protocols are very troublesome and the flexibility is poor. This course explains how to use Axi directly Bus to read and write DDR data of PS terminal, which involves axi4 protocol, FPGA debugging of vivado, etc.)
- 2021-01-22 17:46:44下载
- 积分：1
