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license
quartus license dede(quartus 11.0 license)
- 2014-04-21 18:26:12下载
- 积分：1
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cpsk_dpsk
数字通信系统相移键控CPSK信号和差分相移键控的调制与解调的VHDL代码(Phase shift keying digital communication system CPSK signals and differential phase-shift keying modulation and demodulation of the VHDL code for)
- 2009-11-06 16:11:03下载
- 积分：1
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全加器
利用Verilog语言编写的，在vivado环境下带进位标志的全加器的工程文件与Testbench(Engineering files and Testbench of the full adder with the carry mark in vivado environment written by Verilog language)
- 2018-08-06 14:15:55下载
- 积分：1
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HYG32024032T-bT62L-VA
此为华远显示320*240LCD驱动程序，该程序也适用于带RA8806控制器的LCD(This is the Huayuan display 320* 240LCD driver, the program also applies with RA8806 LCD controller)
- 2013-06-08 16:12:53下载
- 积分：1
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SMBus
SMbus通讯协议的Verilog程序段，已通过Moldesim的仿真，可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)
- 2021-03-24 18:29:15下载
- 积分：1
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masera2017
fpga hardware hevc implementation
- 2018-08-06 01:26:57下载
- 积分：1
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Pc.v
计算机中每一条机器指令的执行，都离不开程序计数器的正确执行，本程序实现程序计数器。(Computer implementation of each machine instruction, are inseparable from the correct implementation of the program counter, this program achieve the program counter.)
- 2010-08-04 17:03:00下载
- 积分：1
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mig_v7_4
说明： 针对XILINX 7系列FPGA 中MTG的驱动代码，代码的接口部分主要分为两个部分，一是控制DDR的DMA大小，选择读写，每次DMA的起始地址；二数据部分为AXIS。
已经在多个工程中使用。(For the driver code of MTG in XILINX 7 series FPGA, the interface part of the code is mainly divided into two parts, one is to control the DMA size of DDR, select read and write, the starting address of each DMA; the second data part is AXIS.
It has been used in multiple projects.)
- 2020-05-09 16:05:17下载
- 积分：1
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nerualnetwork
本文为通信专业硕士研究生的毕业论文。主要研究神经网络的FPGA实现及其在网络拥塞控制中的应用。
(In this paper, for the communications professional Master s thesis. Major study of the FPGA realization of neural networks and its application in network congestion control applications.)
- 2008-12-14 01:37:03下载
- 积分：1
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61EDA_D888
基于Verilog HDL出租车计费系统的研制(Based on Verilog HDL Taxi Accounting System)
- 2010-01-07 18:30:10下载
- 积分：1
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