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vivado2019d1license
说明: vivado的license ,可以用在2019.1,2019.2,在win10 64bit上已检验过.(It can used in vivado2019.1,2019.2)
- 2020-03-21 17:15:21下载
- 积分:1
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NTR2120
超低速的光纤一体发接收发送器,同于以前的光纤一体化接头都只适用于2M以上的通讯,如需将232等低速信号用光纤传输出,需要加复杂的调制解调电路,网动光电新生产的这款光纤头主要针对低速信号,可以传送DC-500KPS的信号,极大地简化了硬件设计.(Ultra-low-fat whole-speed fiber-optic transmitter receiver with fiber-optic integration in the previous joint only applies to more than 2M communications, etc. For the 232 low-speed optical fiber transmission of signals, the need to increase the complexity of the modulation and demodulation circuit, the net move Photoelectric new production of this first major response to low-speed fiber-optic signal, DC-500KPS can send the signal, greatly simplifying the hardware design.)
- 2008-06-27 11:48:58下载
- 积分:1
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verilog编写的计算百分比模块
verilog编写的计算百分比模块-Verilog prepared by calculating the percentage module
- 2022-01-31 18:38:18下载
- 积分:1
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package_control-master
从github下载的,能够参考设计AXI4的协议接口(AXI4 Verilog template)
- 2019-03-30 16:14:05下载
- 积分:1
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UML_2_Pour_les_bases_de_donnees
UML2 apprendre a modeliser a l aide de UML
- 2014-02-25 01:32:23下载
- 积分:1
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sp6des
串行数据开发实用代码, 适合初级学习者使用 很不错(Serial data to develop a practical code for primary learners use very good)
- 2013-01-10 14:54:11下载
- 积分:1
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cpld/fpga common adder Verilog design procedures
cpld/fpga常用加法器设计的verilog程序-cpld/fpga common adder Verilog design procedures
- 2022-08-19 10:20:20下载
- 积分:1
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io 组件,用vhdl实现io端口的控制,包括输入输出,握手信号,...
io 组件,用vhdl实现io端口的控制,包括输入输出,握手信号,-io port VHDL code
- 2023-04-27 18:40:03下载
- 积分:1
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VGA
verilog vga 图像处理(verilog vga)
- 2013-10-15 19:00:16下载
- 积分:1
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FPGA讲义适合中等以上读者,主要是FPGA的一些高级应用
FPGA讲义适合中等以上读者,主要是FPGA的一些高级应用-FPGA notes for readers more than moderate, mainly a number of advanced applications FPGA
- 2022-06-16 08:29:17下载
- 积分:1