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altera 公司的15IP源码
亲自测试还不错 有DIV, CONTER
altera 公司的15IP源码
亲自测试还不错 有DIV, CONTER-ALTERA the 15IP source personally tests are also good DIV, CONTER
- 2022-03-13 02:56:46下载
- 积分:1
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adder2
此源代码是基于Verilog语言的持续赋值方式定义的 2 选 1 多路选择器 、阻塞赋值方式定义的 2 选 1 多路选择器、非阻塞赋值、阻塞赋值、模为 60 的 BCD码加法计数器 、模为 60 的 BCD码加法计数器、BCD码—七段数码管显示译码器、用 casez 描述的数据选择器、隐含锁存器举例 ,特别是模为 60 的 BCD码加法计数器,这是我目前发现的最优源代码,应用于解码器领域。(This source code is based on the Verilog language define the continued assignment of 2-to-1 multiplexer, blocking assignments define the 2-to-1 multiplexer, non-blocking assignments, blocking assignments, module code for the addition of 60 BCD counters, BCD code module for the addition of 60 counters, BCD code- seven-segment LED display decoder, the data described by casez selector, for example hidden latch, in particular, the BCD model code for the addition of 60 counters, this is my found that the best current source code, the decoder used in the field.)
- 2010-10-30 15:14:06下载
- 积分:1
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4ASKmod2
讲述4ASK的原理并附有matlab调制解调的源码。。。。。。。。。。
注:原来上传的4ASKmod.zip不要下(The principle tells 4ASK together with modulation and demodulation matlab source. . . . . . . . . . Note: The original upload 4ASKmod.zip not down)
- 2013-07-10 00:01:10下载
- 积分:1
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LCD1602_B
说明: Verilog实现液晶1602显示,学习使用(Verilog LCD1602)
- 2009-08-09 10:57:02下载
- 积分:1
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《Verilog HDL 程序设计教程》6
《Verilog HDL 程序设计教程》6-"Verilog HDL Design Guide" 6
- 2022-02-21 13:38:55下载
- 积分:1
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PS2 source VHDL, and can be connected directly to the computer. So the mouse, ke...
PS2的源代码VHDL语言实现,可以和计算机直接连接.做鼠标键盘接口.-PS2 source VHDL, and can be connected directly to the computer. So the mouse, keyboard interface.
- 2022-11-10 10:10:04下载
- 积分:1
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keyscan
利用VHDL语言编写的4*4键盘扫描程序,经过测试,可以放心使用。(Using VHDL language 4* 4 keyboard scanning procedures, tested, safe to use.)
- 2013-09-28 21:48:45下载
- 积分:1
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NN-using-FPGA
thesis about design and implementation neural network using FPGA
- 2013-12-29 16:23:52下载
- 积分:1
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eDP
eDP接口TFT-LCD显示驱动原码(verilog+c)(eDP Interface TFT-LCD display driver source code (verilog+c))
- 2020-10-17 09:17:27下载
- 积分:1
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使用vhdl语言在altera公司的up3板上产生vga信号,里面有详细的解析和说明,是一个很好的教程。...
使用vhdl语言在altera公司的up3板上产生vga信号,里面有详细的解析和说明,是一个很好的教程。-use of the VHDL language ALTERA company"s board up3 have vga signal containing a detailed analysis and explanation is a good guide.
- 2023-06-25 15:05:03下载
- 积分:1