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tcp_ip_core_w_dhcp_latest.tar
以太网协议 TCP/IP/DHCP协议verilog实现(Ethernet IP/TCP/DHCP verilog source code)
- 2018-08-23 14:35:01下载
- 积分：1
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Verilog数字系统设计教程(第二版) 夏宇闻
说明： Verilog数字系统设计教程(第二版) 夏宇闻(Verilog Digital System Design Course (2nd Edition) Xia Yuwen)
- 2020-06-20 18:40:02下载
- 积分：1
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exercise3
用verilog实现dsp与Fpga接口的同步设计，其功能包括读写操作及四个功能模块，采用两个fifo实现不同时钟域的地址与数据的转换，在quartus ii11.0环境下运行，运行此程序之前需运行将调用fifo。(Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modules, using two different clock domains to achieve fifo address and data conversion in quartus ii11.0 environment to run, run this program required before running calls fifo.)
- 2013-08-30 11:12:09下载
- 积分：1
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FPGA-a-CPLD-newest-Technology-guide
FPGA／CPLD技术是近年来计算机与电子技术领域的又一场革命。本书以Xilinx与Altera公司的FPGA／CPLD为主，详细介绍了FPGA／CPLD从芯片到MAX+plusⅡ、Quartus与ISE开发环境和Verilog／VHDL语言，并以交通灯逻辑控制、电子钟与点阵LED显示、LCD液晶显示及计算机ISA接口和PCI接口的设计等为例，由浅入深地详述了如何应用FPGA／CPLD进行电子设计。书中的大多数电路图和源程序已经过实例验证，读者可以直接应用于自己的设计。本书的特点是强调实用性和先进性，力求通俗易懂。
本书适用于计算机、电子、控制及信息等相关专业的在校大学生，对广大工程技术人员也具有实用价值。(FPGA/CPLD technology in recent years the field of computer technology and electronic another revolution. Book Xilinx and Altera' s FPGA/CPLD based, detailing the FPGA/CPLD from the chip to MAX+plus Ⅱ, Quartus and ISE development environment and Verilog/VHDL language and logic control traffic lights, electronic bell with dot matrix LED display , LCD liquid crystal display and computer ISA interface and PCI interface design, for example, progressive approach to detail how the application of FPGA/CPLD for electronic designs. Circuit and the source of most of the book have been instances of verification, the reader can be directly applied to their own design. Characteristic of this book is to emphasize the practical and advanced, best straightaway. This book applies to computers, electronics, control and information and other related professional college students, the majority of engineering and technical personnel also has practical value.)
- 2013-08-27 11:39:27下载
- 积分：1
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lisa-vhdl2va
通过modelsim仿真检测matlab生成滤波器效果。(Generate the filter through matlab and simulated by modelsim.)
- 2013-12-12 11:17:18下载
- 积分：1
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USB245I based FPGA VHDL of the driver, should useful
USB245I的基于FPGA的VHDL语言的驱动程序,应该有用-USB245I based FPGA VHDL of the driver, should useful
- 2022-08-09 23:10:50下载
- 积分：1
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modulation-and-demodulation
通过verilog语言实现各种基本信号的调制解调过程，包括2psk,qpsk,ppm(Realize the modulation and demodulation process of various basic signals through verilog language, including 2psk, qpsk, ppm)
- 2018-04-26 21:52:04下载
- 积分：1
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SDRAM的vegilog代码，做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块...
SDRAM的vegilog代码，做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块-SDRAM
- 2022-10-13 14:20:04下载
- 积分：1
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matrix_class
it is a matrix library. it is needed for fir fier.
- 2014-08-29 22:29:24下载
- 积分：1
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24秒倒计时系统（有跑马灯）
利用CPLD
24秒倒计时系统（有跑马灯）
利用CPLD-24 seconds remaining systems (5,250) using CPLD
- 2022-03-26 05:51:13下载
- 积分：1
