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Block-cipher-lock
密码锁verilog源代码，包括四个七段数码管显示模块，设置密码以及输入密码校验模块(Password lock Verilog source code, including four of seven digital tube display module, set the password and password verification module)
- 2014-01-11 23:57:19下载
- 积分：1
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This is is a bridge IP core to interface the Tensilica PIF bus protocol with the...
This is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB configuration.-This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB configuration.
- 2022-04-07 07:47:24下载
- 积分：1
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SD_rtl
用verilog实现sd卡读写，亲测可用(Implementation of SD card read and write with Verilog)
- 2020-12-27 21:49:02下载
- 积分：1
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32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考...
32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考-32/route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only
- 2023-09-04 17:30:04下载
- 积分：1
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tcd_driver
东芝ccd产品tcd1209驱动程序，生成1209所需的驱动波形(toshiba ccd tcd1209 )
- 2021-02-23 09:29:40下载
- 积分：1
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modelsim_ug
Mentor Graphics ModelSim User s Guide Software v6.3g
- 2010-04-18 13:30:25下载
- 积分：1
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Frecuencymeter
Frecuencymeter digital, clk frequency 10 MHZ, exhibition in 7 segments
- 2009-09-17 02:49:40下载
- 积分：1
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单片机课程设计——交通灯_1
一个交通灯设计,简单的实现，没有添加其他的显示管(Traffic Light System)
- 2020-06-21 10:40:02下载
- 积分：1
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jiaotongdeng
交通灯通过数码管显示，几种模式可调，还可以时间可设，适合初学者入门参考学习。(LED traffic lights can be set to several modes adjustable time beginners reference ~ ~ ~)
- 2013-08-25 10:02:34下载
- 积分：1
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ds312_Spartan-3E-FPGA
FPGA资料与所用元器件的数据参考手册与应用指南(ds312_Spartan-3E FPGA Family )
- 2012-09-18 21:43:54下载
- 积分：1
