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ddr3_test
说明： 通过循环读写DDR3内存，了解其工作原理和DDR3控制器的写法，由于DDR3控制复杂，控制器的编写难度高，这里笔者介绍XILINX的MIG控制器情况下应用，是后续音频、视频等需要用到SDRAM实验的基础。(Through reading and writing DDR3 memory circularly, we can understand its working principle and the writing method of DDR3 controller. Because of the complexity of DDR3 control, it is difficult to write the controller. Here, the author introduces the application of Xilinx's MIG controller, which is the basis of SDRAM experiment for subsequent audio and video.)
- 2021-04-16 10:00:15下载
- 积分：1
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cpu_easy
ADD MOV MOVi SUB四指令cpu设计，qutartus，(Design of four-instruction CPU)
- 2019-05-13 11:44:49下载
- 积分：1
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20080931
Design approach for VHDL and FPGA Implementation of
Automotive Black Box using CAN Protocol
- 2009-10-23 00:20:47下载
- 积分：1
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resolutionquartusII
用verilog编写的分辨率提高的源代码 采用双线性插值(Written resolution with the verilog source code to improve the use of bilinear interpolation)
- 2021-05-14 18:30:02下载
- 积分：1
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quartus-ii-automatically-assign-pins
quartus ii 中自动分配管脚的三种方法(quartus ii automatically assign pins are three ways)
- 2012-03-31 17:12:54下载
- 积分：1
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verilog 温度控制命令
verilog 温度控制命令 实现了温度的采集和运算，以及其他控制命令 很好哦
- 2022-10-26 07:40:02下载
- 积分：1
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class-test
自己编写的C++的类的测试程序，有详细的注注释，对初学者有很大帮助！！！(The own written C++ class test program, detailed annotation of Note of great help for beginners! ! !)
- 2012-08-28 09:24:41下载
- 积分：1
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code
说明： 8位RISC-CPU设计和测试文件，5位操作码支持32条指令，含堆栈实现子程序调用功能。(8-bit risc-cpu design and test file, 5-bit opcode supports 32 instructions, including stack to realize subroutine call function.)
- 2020-07-15 20:15:51下载
- 积分：1
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DE1 SOC D5M两相机
应用背景两个摄像头，一个FPGA。相机都可以显示在VGA显示器采用开关[ 5 ]。关键技术ccd_capture V / V。i2c_ccd_config V / V。i2c_controller V / V。raw2rgb V / V。seg7_lut V / V。vga_controller V / V。
- 2022-09-14 14:45:03下载
- 积分：1
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CodedLOCK
基于FPGA的电子密码锁设计与实现，语言是VHDL语言，有注释(FPGA-based design and implementation of electronic locks, language is VHDL language, annotated)
- 2013-08-27 21:37:06下载
- 积分：1
