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New FPGA
基于FPGA的新型数据位同步时钟提取(CDR)实现方法-New FPGA-based data bit sync clock extraction (CDR) method
- 2023-03-23 03:30:04下载
- 积分：1
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mac
基于网口的收发数据及解析数据内容的verilog代码实现(Based on the Internet port to send and receive data and parse the contents of the data verilog code)
- 2017-04-24 10:13:55下载
- 积分：1
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CH372
USB设备接口的驱动程序，采用verilogHDL语言编写，并包含相关说明资料(USB device driver interface, using verilogHDL language, and contains descriptive information)
- 2014-01-03 02:23:08下载
- 积分：1
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PWM
verilogHDL语言编写，简单的FPGA脉冲程序，初学者必备。(verilogHDL language, a simple FPGA pulse program, beginners must.)
- 2012-12-27 11:54:45下载
- 积分：1
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FPGA控制的SRAM接口不分的设计
FPGA控制的SRAM接口不分的设计-FPGA-controlled SRAM interface design, regardless of
- 2023-02-19 02:15:03下载
- 积分：1
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pci_fpga
对pci9054芯片的配置进行了设置，并对PCI9054的各状态机进行了设置，程序经过了测试(Pci9054 chip on the configuration of the set, and each state machine PCI9054 been set, the program have been tested)
- 2013-10-12 11:39:45下载
- 积分：1
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Decodificador
System Verilog decodificator.
Enters a value(binary), drops hundreds, tens and units in BCD
- 2013-05-15 02:11:45下载
- 积分：1
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clock_6
ds1302时钟驱动程序，已在quartus上验证可以是直接使用(DS1302 clock driver, which has been verified on quartus, can be used directly)
- 2020-06-24 12:00:02下载
- 积分：1
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farrow
该程序实现多项式分数延迟（farrow）的设计。(The program polynomial fractional delay (farrow) design.)
- 2014-12-11 10:21:39下载
- 积分：1
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EP2C70F896C6N-pins
将VHDL程序下载到DE2开发板，引脚分配时需要知道的芯片每个引脚功能(VHDL program will be downloaded to the DE2 development board, you need to know when the pin assignments for each pin of the chip functions)
- 2020-12-09 11:09:21下载
- 积分：1
