-
1pps
说明: fpga程序,产生1pps脉冲信号,使用的verilog语言。(FPGA program generates 1 PPS pulse signal, using Verilog language.)
- 2020-06-20 17:00:01下载
- 积分:1
-
FIFO
fifo异步串口收发程序 FPGA程序(fifo asynchronous serial transceiver)
- 2014-05-07 21:28:49下载
- 积分:1
-
coe
自动计算fir滤波器系数的工具,不妨一试(Automatic calculation of filter coefficients fir tools, try)
- 2009-04-11 17:20:49下载
- 积分:1
-
sdram_cmd命令集
sdram_cmd.v是控制sdram的命令集合。网上资料,是控制sdram的命令集合。网上资料。控制sdram的命令集合。网上资料控制sdram的命令集合。网上资料。
- 2022-05-10 21:41:40下载
- 积分:1
-
ozgul2013
说明: Digital pre-distortion (DPD) is an advanced digital
signal-processing technique that mitigates the effects of power
amplifier (PA) nonlinearity in wireless transmitters. DPD plays
a key role in providing efficient radio digital front-end (DFE)
solutions for 3G/4G basestations and beyond. Modern FPGAs
are a promising target platform for the implementation of flexible
wireless DFE solutions, including DPD.
- 2019-01-05 18:20:30下载
- 积分:1
-
FRUDH
用VHDL实现频率计,可测量输入脉冲的频率,并进行简单校正(Realize the frequency of use of VHDL in terms of measurable input pulse frequency, and a simple correction)
- 2008-07-07 20:13:30下载
- 积分:1
-
DW_apb_timer
verilog实现计时器timer,可直接用于芯片开发中。(verilog achieve timer, it can be directly used for chip development.)
- 2016-04-05 22:37:39下载
- 积分:1
-
Signal
基于FPGA的DDS相位累加器,连接至存有波形数据的rom后再接至DA可以输出对应的波形(abcdefghijklmnopqrstuvwxyz)
- 2018-05-10 15:19:05下载
- 积分:1
-
sinwave
使用verilog hdl语言编程正弦波信号,能仿真出结果(Can use verilog HDL language programming sine wave signal, the simulation results
)
- 2013-09-18 15:27:27下载
- 积分:1
-
fpga Verilong 实现以太网
在fpga下 ,完全用verilong编写的以太网程序,可以进行tcp/IP通信,请不要用在商业用途中,谢谢
- 2022-10-05 04:20:03下载
- 积分:1