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                        LineBuffer仿真
                        
                          在Verilog的编写中,IP核的调用会使项目的开发更加方便快捷,对于初学者来说,IP核调用很抽象,通过一个具体的简单的的例子可以使大家更清晰明了的理解IP核的调用,对Verilog的学习是有帮助的。                         
                            - 2022-12-06 13:50:04下载
- 积分:1
 
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                        APF_Series_dq0_ad
                        
                          串联型有源电力滤波器的 PSCAD仿真,能检测到谐波电压,本仿真的优势是能针对电压跌落或者升高进行自动补偿。(PSCAD simulation of Series type APF (Active Power Filter),this project can dectect the drop of voltage and compensates auomaticly.)                         
                            - 2013-03-13 22:51:50下载
- 积分:1
 
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                        联邦滤波法lianbanglvbo
                        
                          联邦滤波法,毕设时写的,可以和其他方法的做比较(Kalman filter, write the complete set up, and other methods to compare)                         
                            - 2020-12-01 18:49:26下载
- 积分:1
 
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                        wave_coif3
                        
                          滤波器的实现,总共为4种,是简单的coif3滤波器的实现方法(The implementation of the filter, a total of 4, is a simple coif3 filter implementation method)                         
                            - 2018-03-24 21:05:14下载
- 积分:1
 
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                        用verilog语言实现的霍夫曼压缩编码算法
                        
                          说明:  一种用verilog语言实现的霍夫曼压缩编码算法(Huffman compression implemented by Verilog)                         
                            - 2019-11-18 18:29:45下载
- 积分:1
 
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                        DS1302
                        
                          说明:  本代码是控制DS1302的VHDL代码,浅显易懂,方便修改,注意看data sheet,保证时钟和各个延迟满足要求即可(This code is to control the DS1302' s VHDL code, easy to understand, easy changes, note the data sheet, ensure the clock and can meet the requirements of the various delays)                         
                            - 2020-10-22 14:57:23下载
- 积分:1
 
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                        UART_RX_
                        
                          fpga串口的发送程序基于verilog语言拿走不用谢。(The sending program of FPGA serial port is based on Verilog language.)                         
                            - 2020-06-18 04:00:01下载
- 积分:1
 
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                        AD9469 FPGA 代码  软件无线电前端
                        
                          AD9469 FPGA 代码  软件无线电前端
AD9469 Verilog 代码 
FIFO后数据处理等                         
                            - 2022-04-19 09:18:49下载
- 积分:1
 
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                        msp430x41x
                        
                          低电源电压范围为1.8 V至3.6 V
超低功耗:
 - 主动模式:280μA,在1 MHz,2.2伏
 - 待机模式:1.1μA
 - 关闭模式(RAM保持):0.1μA
五省电模式
欠待机模式唤醒
超过6微秒
16位RISC架构,
125 ns指令周期时间
12位A/ D转换器具有内部
参考,采样和保持,并
AutoScan功能
16位Timer_B随着三† 或七‡ 
捕捉/比较随着阴影寄存器
具有三个16位定时器A
捕捉/比较寄存器
片上比较器
串行通信接口(USART),
选择异步UART或
同步SPI软件:
 - 两个USART(USART0 USART1)的† 
 - 一个USART(USART0)‡ 
掉电检测
电源电压监控器/监视器
可编程电平检测
串行板载编程,
无需外部编程电压
安全可编程代码保护
融合(Low Supply-Voltage Range, 1.8 V to 3.6 V
Ultralow-Power Consumption:
−   Active Mode: 280 µ A at 1 MHz, 2.2 V
−   Standby Mode: 1.1 µ A
−   Off Mode (RAM Retention): 0.1 µ A
Five Power Saving Modes
Wake-Up From Standby Mode in Less 
Than 6 µ s
16-Bit RISC Architecture,
125-ns Instruction Cycle Time
12-Bit A/D Converter With Internal
Reference, Sample-and-Hold and
Autoscan Feature
16-Bit Timer_B With Three†  or Seven‡ 
Capture/Compare-With-Shadow Registers
16-Bit Timer_A With Three
Capture/Compare Registers
On-Chip Comparator
Serial Communication Interface (USART),
Select Asynchronous UART or
Synchronous SPI by Software:
−   Two USARTs (USART0, USART1)† 
−   One USART (USART0)‡ 
Brownout Detector
Supply Voltage Supervisor/Monitor With
Programmable Level Detection
Serial Onboard Programming,
No External Programming Voltage Needed
Programmable Code Protection by Security
Fuse)                         
                            - 2012-05-31 15:26:33下载
- 积分:1
 
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                        i2c
                        
                          说明:  I2C完整代码,可综合,可仿真,已经过验证(I2C code can been syn and simulation ,veritify)                         
                            - 2021-02-26 13:11:46下载
- 积分:1