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AHB-answers
这个文档回答了很多关于AHB总线在使用上经常遇到的问题(this doc gives a lot of answers for using AHB bus when doing design)
- 2020-10-21 12:17:24下载
- 积分：1
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用VerilogHDL进行频率生成器。
yong VerilogHDL yu yan bianxie de pinlv fa sheng qi,shi yong ISE ruan jian da kai.-Used VerilogHDL to make a frequency builder.
- 2022-01-21 03:50:48下载
- 积分：1
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top1
fpga，主要功能是实现n*n图像的旋转，源程序代码，(fpga, main function is to achieve the n* n image rotation, source code,)
- 2020-07-08 15:48:56下载
- 积分：1
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20190717 - Copy
this describes building spi block on verilog hdl and programming them on an fpga device
- 2020-06-21 21:40:02下载
- 积分：1
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FFT_Module
接收机数字部分FFT模块的代码
包括verilog代码、
matlab仿真、
word文档
testbench
实现FFT(The code of the digital part FFT module of the receiver
Including Verilog, matlab simulation, testbench
Implementation of FFT)
- 2020-11-18 20:49:38下载
- 积分：1
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SystemVerilog_For_Design_Springer_2nd_Ed_2006
SystemVerilog For Design (Springer-2nd_Ed-2006)
- 2009-10-08 02:57:28下载
- 积分：1
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show frequency measurement, external 24MHz crystal oscillator, the data show tha...
显示频率测量，外接24MHz晶振，显示数据为三位，分四个档来测量-show frequency measurement, external 24MHz crystal oscillator, the data show that three, four hours to measure stalls
- 2022-03-16 13:33:43下载
- 积分：1
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Coding Style
说明： 良好的Coding Style能减少Bug，减少锁存器出现的可能以及其他隐藏逻辑错误，也有助于减小芯片面积或所用资源(Good Coding Style can reduce Bug, reduce the possibility of latches and other hidden logic errors, and also help to reduce chip area or resources used.)
- 2020-06-17 12:00:01下载
- 积分：1
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CPU
不同方法实现的CPU系统。同样支持加减乘，逻辑/算术移位，与或非等建议指令。(Different methods to achieve CPU system. Also supports, subtraction, multiplication, logic/arithmetic shift, and the like or recommend instruction.)
- 2016-04-16 20:30:51下载
- 积分：1
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FPGA 的数字传输比
计算多少次，把小砂轮安装数字传输比率是车轮的在一个更大完全旋转旋
- 2022-03-19 23:13:15下载
- 积分：1
