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DPLL_TEST
单相数字锁相环 鉴相器 环路滤波器 数控振荡器(Single-phase digital phase-locked loop phase detector loop filter numerically controlled oscillator)
- 2013-05-17 11:16:13下载
- 积分：1
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f_adder
该工程描述的是一位全加器，可以用此作为基础，搭建多位全加器(The project description is a full adder can use this as a basis to build a number of full adder)
- 2013-04-21 10:30:16下载
- 积分：1
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Verilog for lsfr over bist
当设计的记忆与大的部分，其中包括电容对位线。两位线用于执行读和写操作，由于放电电容在写操作中的操作。7T sram 存储单元减少了活性因子的排位线对执行写操作。7T sram 存储单元减少了活性因子的排位线对执行写操作。
- 2023-05-17 22:35:03下载
- 积分：1
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med_filter
基于图像处理的中值滤波VHDL源码,能够实现对图像的滤波(Based on the median filter VHDL source image processing, image filtering can be achieved)
- 2014-07-15 10:28:28下载
- 积分：1
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APB_timer
说明： 设计一个挂载在 APB 总线上的计数器，按照 APB 的时序给计数器赋值，主
机通过地址对计数器进行配置，通过数据输入端口给计数器设置计数器最大值，
并通过数据输出端口输出计数器的计数值。该设计还设置了一个计数完成信号，
当计数器满足模式配置后的计数要求时，会将该信号拉高(A counter mounted on the APB bus is designed. The counter is assigned according to the sequence of APB
The computer configures the counter through the address and sets the maximum value of the counter through the data input port,
And output the count value of the counter through the data output port. The design also sets a count completion signal,
When the counter meets the counting requirements after the mode configuration, the signal will be pulled high)
- 2021-05-14 17:30:02下载
- 积分：1
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src
yuv444 与yuv422相互转换verilog语言(yuv444 to yuv422)
- 2021-01-20 14:38:41下载
- 积分：1
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FMS-Labor-3
MICarrayWeights and MICarrayplot
- 2011-06-20 17:57:00下载
- 积分：1
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RSA的VHDL代码
Here, we present the first available open-source 512 bit RSA core. This is an early
prototype version of a full FIPS Certified 512-4096 capable RSA Crypto-core which will be on sale
soon. The version provided, has not the same performance than the final product since it was a
proof of concept that we decided to release to the community in order to help small projects which
need RSA ciphering.
- 2022-09-07 05:20:03下载
- 积分：1
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UVM内存的工作实例
嗨伙计， 附加的文件包含了完整的工作示例通用验证方法学基于系统VERILOG
- 2022-03-16 00:32:53下载
- 积分：1
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13_CMOS_OV7725_Gray_Mean_Filter
基于FPGA开发的均值滤波程序，效率很高，非常有用(Based on FPGA development of the mean filter program)
- 2017-09-25 19:06:06下载
- 积分：1
