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performance-of-pcie
本白皮书探讨了在PCI Express的因素
技术可能会影响性能。它还
提供指导如何估算
的系统性能。(This white paper explores the factors in PCI Express technology may affect performance. It also provides guidance on how to estimate the system performance.)
- 2013-10-29 10:52:43下载
- 积分:1
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finale
a power point presentation presenting how to impliment EMF and GMF with DDS
- 2016-10-28 17:48:42下载
- 积分:1
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verilog cpu代码
2、处理器的指令系统采用了MIPS CPU的常用指令,处理器结构参考MIPS的体系结构进行设计。总线宽度为32位。
3、完成的MIPS指令集:
R型:SLLV,SRAV,ADDU,SUBU,AND,OR,XOR,NOR,SLT,JR
J型:J
I型:BLTZ,BGTZ,BEQ,LW,SW,ADDIU,SLTI,ANDI,ORI,XORI。
- 2022-05-07 08:08:58下载
- 积分:1
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mig_7series_v1_9
DDR3控制器源码,针对XilinxFPGA的DDR3控制器的源码,已经验证通过。(DDR3 Controller,complete DDR3 controll,have pass verificaion.)
- 2016-08-16 09:27:43下载
- 积分:1
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CPUdesign
说明: 计算机组成原理实验多时钟周期CPU设计,包含VHDL代码的设计,实验电路图,实验详细截图。(Computer component experiments designed more CPU clock cycles, including VHDL code design, test circuit, test detailed screenshots.)
- 2020-09-07 19:28:05下载
- 积分:1
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G.hnMAC层功能代码MPDU ASSEMBLER
G.hnMAC层功能代码,实现了MPDU的资源调度(G.gn MAC codeG.gn MAC codeG.gn MAC code)
- 2011-05-18 11:23:08下载
- 积分:1
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ddr3_model
一个verilog语言开发编写的简单的ddr3模型(A simple model ddr3, written with verilog language)
- 2020-08-26 17:38:13下载
- 积分:1
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a
用verilog实现除法器,调用了ip核,不仅有源代码,还有测试程序的时序编写(verilog ise divider)
- 2013-07-21 15:03:31下载
- 积分:1
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CY7C68013A_board_test
该资料基于FPGA实现USB2.0的高速传输,即CY7C68013A芯片的数据传输,包括FPGA与上位机之间数据的相互传输,CY7C68013A的传输速率最高可达480M/S。(The FPGA-based high-speed data transmission USB2.0, that CY7C68013A chip data transmission, including the mutual transmission of data between the FPGA and the host machine CY7C68013A transfer rate up to 480M/S.)
- 2020-08-24 21:48:15下载
- 积分:1
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9_ImageMorphologic
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像形态学部分,腐蚀,膨胀,细化算法(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image morphology section, corrosion, swelling, thinning algorithm)
- 2020-10-23 17:17:22下载
- 积分:1