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High
高速多通道crc实现，可以并行实现5个通道数据的校验，支持10GB以太网标准-High-speed multi-channel crc implementation, can be achieved in parallel 5-channel data validation, support for 10GB Ethernet standard
- 2022-07-18 13:13:37下载
- 积分：1
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扩频通信的Verilog工程
扩频通信的Verilog工程，对从事无线通信的工程人员有参考作用。(Spread spectrum communication Verilog project, engaged in wireless communications engineering staff reference.)
- 2017-06-11 10:29:12下载
- 积分：1
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The VHDL source code digital clock, you can achieve at school, school grade feat...
数字钟的VHDL源程序，可以实现校时，校分等功能，并在试验箱上运行成功-The VHDL source code digital clock, you can achieve at school, school grade features, and success in the chamber is running on
- 2023-02-06 10:05:04下载
- 积分：1
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FPGA时钟闹钟+电子琴+lcd显示
xlinx sparten 3E实验板，实现时钟闹钟功能，闹钟播放电子音乐，时钟，闹钟通过LCD屏显示。自己写的，亲测可用。
- 2022-03-05 16:40:01下载
- 积分：1
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HEX_DISPLAY
Simple vhdl description to show numbers on 7-segment s on Altera DE2 board.
- 2010-02-13 21:09:15下载
- 积分：1
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arbiter_ip
Arbiter code for simulation purpose
- 2013-07-13 17:45:11下载
- 积分：1
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gmii_tx_mac
实现千兆以太网数据发送，通过GMII接口向PHY写数据，控制PHY发送数据。(Implementation of Gigabit Ethernet data transmission, write data to the PHY through the GMII interface, control PHY data.)
- 2013-08-08 15:24:43下载
- 积分：1
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775dbfc273b27329d455f8257e85d839cc5d
CPFSK Demodulation Techniques
- 2018-09-18 17:31:30下载
- 积分：1
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vhdl语言主要描述语句的说明和使用方法，内附例子可供学习提高...
vhdl语言主要描述语句的说明和使用方法，内附例子可供学习提高-VHDL language description of the main description of statements and the use of methods, containing examples for learning improve
- 2022-01-31 14:01:30下载
- 积分：1
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~ VHDL源代码的FFT IP核
FFT变换的IP核的源代码 VHDL~-FFT IP core of the source code for VHDL ~
- 2022-02-25 23:54:48下载
- 积分：1
