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FSK
FPGA实现FSK调制,带Modelsim仿真,实际系统测试通过,载波信号,信号频率等可调。(FPGA implementation FSK modulation with Modelsim simulation, the actual system test, the carrier signal, the signal frequency is adjustable.)
- 2020-09-03 11:38:07下载
- 积分:1
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LEDcontrol
fpga控制led灯的闪烁,内容简单,希望对初学者有用.(fpga control led lights flashing, the content is simple, I hope useful. . .)
- 2015-05-05 10:00:11下载
- 积分:1
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AXI slave
一个AXI slave的Verilog实现代码,内部有基于UVM编写的testbench,该slave是基于AXI3协议来实现的,可以给初学者一些启示
- 2023-09-07 19:50:05下载
- 积分:1
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DPSK的FPGA调制
基于FPGA的DPSK调制,包括matlab仿真代码,NCO载波发生器,绝相变化,上变频等,基于Altera FPGA实现,并通过仿真验证。
- 2023-06-18 07:55:04下载
- 积分:1
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Endat2_1_freq
用verilog实现endat2_1驱动,并用signalTap捕捉信号。(Using verilog achieve endat2_1 drive and use signalTap capture signal.)
- 2021-04-26 15:08:45下载
- 积分:1
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THS1206
FPGA来实现数据采集,AD采用TI公司的THS1206,高速并行AD,内含16字FIFO,降低硬件复杂度。(FPGA to realize data acquisition, AD using TI company s THS1206, high-speed parallel AD, containing the 16-character FIFO, to reduce hardware complexity.)
- 2009-07-09 09:08:27下载
- 积分:1
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shuzi
讲述了全数字信号发生器部分频率值测算的表格(Full digital signal generator frequency value calculation form
)
- 2011-12-17 00:55:01下载
- 积分:1
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atom.2007.12.tar
Cores are generated from Confluence a modern logic design language. Confluence is a simple, yet highly expressive language that compiles into Verilog, VHDL, and C
- 2008-05-12 10:13:23下载
- 积分:1
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Verilog Booth 型乘法器
此文件描述的 verilog booth 型乘法器的代码。源代码是模拟和验证效果会更好
- 2022-08-21 23:35:26下载
- 积分:1
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adc7606
给FPGA程序,使之产生信号,驱动AD7606读取数据,并行模式。(give FPGA signal to read AD7606)
- 2021-03-29 21:39:10下载
- 积分:1