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uart_byte_rx
说明： libero soc工程，实现通过串口接收到单字节数据后并返回发送给上位机(Libero SOC project, which realizes receiving single byte data through serial port and sending it back to host computer)
- 2020-06-21 09:20:01下载
- 积分：1
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基于 Fpga 的高速 8 位吠陀乘法器
本文介绍了 8 位Vedic乘法器提升传播执行延迟，当相比传统的乘数，像阵列乘法器、 布劳恩乘数、 改性的 booth
型乘法器和华莱士树型乘法器
- 2022-03-20 05:49:21下载
- 积分：1
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phase_test
VHDL,简易音频数字相位表的设计与实现 数字相位测量仪在工业领域中经常用到的一般测量工具，主要应用与同频率正弦信号间的相位差的测量显示。
本系统采用FPGA实现测量的核心部分，主要由数字鉴相、累加计数器、控制器以及寄存与显示译码电路组成。该系统硬件电路简单，整个系统采用硬件描述语言VHDL作为系统内部硬件结构的描述手段，在XILINX公司的ISE9.1的软件支持下完成。可以对20Hz~20kHz频率范围内的音频信号进行采样鉴相处理，并将数据传回FPGA进行相位差计数累加、测量运算，最后送显示译码电路显示，测相范围为 ，相位测量误差 < 。
经测试结果验证，本系统充分利用FPGA对数据的高速处理能力，是系统设计高效、可靠，处理速度快，稳定性高，易于实现。
(VHDL, simple audio digital phase Table Design and Implementation of the digital phase meter general measurement tools are often used in the industrial field, the measurement of the phase difference between the main application with the same frequency sinusoidal signal. The system uses the FPGA implementation of the core part of the measurement, mainly by the digital phase, cumulative counter, the decoding circuit of the controller as well as storage and display. The system hardware circuit is simple, and the entire system using hardware description language VHDL system means a description of the internal hardware structure, completed in the XILINX company ISE9.1 software support. The audio signal in the frequency range of 20Hz ~ 20kHz sampling KAM-phase process, and the data returned FPGA retardation counted accumulation measuring operation, and finally sent to the decoding circuit, the scope of the measurement phase, the phase measurement error < . The test results verify the full u)
- 2012-09-24 10:11:57下载
- 积分：1
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vhdl4
VHDL Language Reference courses part4
- 2010-02-10 00:52:53下载
- 积分：1
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szdyb
关于数字电压表的vhdl实现，有仿真程序，可以下载到板子中。(Vhdl digital voltage meter on the implementation of a simulation program can be downloaded to the board.)
- 2011-05-09 21:09:07下载
- 积分：1
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sd卡中读取数据
可以实现从sd卡中读取数据，不依赖任何的ip核，简洁高效。
- 2022-02-25 04:41:20下载
- 积分：1
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手把手教你学FPGA 仿真篇
手把手教你学FPGA 仿真篇,简单实用。(Hand in hand teach you to learn FPGA simulation, simple and practical.)
- 2018-07-09 21:25:09下载
- 积分：1
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FPGA RAND 生成伪随机数
FPGA生成伪随机数,希望对加密的童鞋有用(FPGA generates pseudo-random numbers, we want to be useful)
- 2013-08-05 16:43:55下载
- 积分：1
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V2.tar
SDIO slave, written in verilog, does not support SPI mode.
- 2021-04-05 16:59:04下载
- 积分：1
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DSP--PFPGA
在FPGA中编写FPGA芯片与DSP28335进行通信的程序(FPGA chip and DSP28335 written in FPGA communication program)
- 2015-02-02 18:46:25下载
- 积分：1
