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ORIGINAL_DOWNLOAD
说明： risc 8 by coonan compatible with PIC16C57
- 2019-12-05 20:32:55下载
- 积分：1
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DDR2_XILINX
xilinx FPGA设计需要的DDR2文件，可以应用于实际设计中(xilinx FPGA design needs DDR2 files that can be applied to the actual design)
- 2014-10-09 09:54:05下载
- 积分：1
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half_adrrrrder
FPGA上的一个半加器实例程序，通过测试，可以直接运行在fpga开发板上。(One and a half adder example on FPGA program, through the test, can be run directly on the FPGA development board)
- 2013-12-01 12:01:31下载
- 积分：1
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LowPassFilter
说明： 内部含3个模块，使用DDS产生200k与500k的正弦波，两者相加后过数字低通滤波（通带0-200k，阻带400k以上），并将波形输出，实测FFT分析中看不到500k分量。其中数字滤波器采用MATLAB设计（FIR+等波纹，阻带衰减-80dB）(There are three modules in the system. DDS is used to generate 200K and 500K sine waves. After adding the two modules, the digital low-pass filter (passband 0-200k, stopband above 400k) is used, and the waveform is output. 500K component can not be seen in the actual FFT analysis. The digital filter is designed by MATLAB (FIR + equal ripple, stopband attenuation - 80dB))
- 2020-09-09 14:21:01下载
- 积分：1
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modulationshaped
基带数字信号通过成形滤波（选用升余弦滚降函数）然后进行载波调制(Base-band digital signal through the shaping filter (raised cosine roll-off optional function) and then proceed to carrier modulation)
- 2007-10-31 15:27:18下载
- 积分：1
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跨时钟域数据传输--经典结绳法
资源描述
说明： 结绳模块(Pluse2Toggle): 负责延长待采样信号
同步模块(Synchronization)：负责双触发器锁存
解绳模块(Toggle2Pluse)： 负责将长信号转换成脉冲信号
支持信号从快时钟域到慢时钟域，也支持信号从满时钟域到快时钟域，
- 2022-02-27 06:40:32下载
- 积分：1
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8086
8086微机原理实验：8251串行接口、8253计数器、数码管、跑马灯。汇编语言。(8086 microcomputer principle experiment: 8251 serial interface, the 8253 counter, digital tube, Marquee. Assembly language.)
- 2013-03-15 11:07:19下载
- 积分：1
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one_2017_v2
说明： 一个编码解码系统，其中包含一个信号发生器（用查找表方式实现）、一个m序列生成器（用来编码和解码用）、一个FiFo队列用来做缓存以及用串口方式进行收发读取数据。(An encoding and decoding system, which includes a signal generator (implemented by look-up table), an m-sequence generator (used for encoding and decoding), a FIFO queue for caching, and a serial port for receiving, transmitting and reading data.)
- 2021-03-15 18:24:40下载
- 积分：1
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ZEDBOARD
ZEDBOARD的管脚分配图和约束文件，包括PCB图和xdc文件(Pin assignment of ZEDBOARD)
- 2021-03-23 21:19:15下载
- 积分：1
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Verilog_traffic
若农场路无车辆，则在高速路保持绿灯。在探测农场路有车辆，高速路上的交通灯应由绿到黄，再到红，并允许农场路方向灯变绿，绿灯亮一段时间，由绿变黄再到红。(If there is no vehicle on the farm road, keep the green light on the highway. There are vehicles on the farm road, the traffic lights on the high speed road should be green to yellow, and then red, and allow the farm road lights to turn green, the green light for a period of time, from green to yellow, then to red.)
- 2020-07-17 21:08:48下载
- 积分：1
