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simwindfarm-v1.0
GFHGFHGFH DFHFDHD GHDHFDHHFD DFHFDHDF
- 2021-04-11 22:08:57下载
- 积分：1
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sdram-source
SDR SDRAM 控制器的源代码 altera公司的(source code from altera)
- 2010-06-09 19:35:03下载
- 积分：1
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Gaussian Random number generator (hardware implemented)
This is hardware implemented Gaussian random number generator based on the article attached in the folder "Document"
The system is based on the Ziggurat Gaussin random algorithm and implemented when I was under-graduate.
Although it is not my original system, it is so helpful cause I can acquire a lot of useful skills of verilog programming such as pipeline.
It is well simulated on the synthesis tool (ISE14.7) and the printed data can be verified using Matlab which is in the "Document" folder.
The testbench fils is tb_Zigg.v, and the top module file is top_Zigg.v
Goodlucks~
- 2022-03-25 01:29:44下载
- 积分：1
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sst3201读写程序HDL代码
实际应用的代码，实测未发现问题。内部模块划分清晰，使用quartus9.0软件编译，完整的工程。清晰的代码风格，方便读懂代码。
- 2022-03-31 18:39:13下载
- 积分：1
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基于verilog的出租车付费系统
基于verilog的出租车付费系统 带验证模块
- 2022-04-18 19:22:44下载
- 积分：1
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adaptive
这是基于MATLAB编程实现自适应滤波器，并在XILINX的FPGA上硬件可实现的模型文件(This is based on the MATLAB programming adaptive filter, and the XILINX' s FPGA hardware can be a model document)
- 2009-06-24 13:26:32下载
- 积分：1
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buffer
用verilog实现的buffer，经过了fpga平台验证。(Implement buffer with verilog.)
- 2020-10-28 12:19:58下载
- 积分：1
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fpgaaverilogamaxamin
verilog 编写的比较最大值最小值得的程序，而且能够求出最大最小值在ram中存储的位置，测试通过下载即用(Comparison of the maximum write verilog smallest worthwhile program, and minimum and maximum values can be obtained is stored in ram position, the test that is used by downloading)
- 2013-06-06 15:44:48下载
- 积分：1
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verilog8
Learning Verilog Chinese Version Part 8
- 2012-06-15 06:04:00下载
- 积分：1
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EP2C70F896C6N-pins
将VHDL程序下载到DE2开发板，引脚分配时需要知道的芯片每个引脚功能(VHDL program will be downloaded to the DE2 development board, you need to know when the pin assignments for each pin of the chip functions)
- 2020-12-09 11:09:21下载
- 积分：1
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