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Multi_function
01 线性调频信号的卷积功能测试(匹配)
02 LFM一维距离像
03 MATLAB联合FPGA仿真输入/输出功能测试
04 解速度模糊
05 扩展目标检测(01 LFM Test function of "conv"
02 LFM Range
03 MATLAB and FPGA
04 resovle speed resolution
05 Extended moving target)
- 2013-05-03 15:53:43下载
- 积分:1
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Veriolg HDL的D触发器
D触发器程序,适合初学者使用和学习,Verilog hdl语言的,使用Xillinx公司的芯片。
- 2022-10-29 12:45:03下载
- 积分:1
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cpri
基于verilog的cpri接口代码,支持各种速率自由切换,量产产品实际应用代码(Cpri interface based on verilog code, support various rate free switch, production products the actual application code)
- 2015-09-21 16:59:59下载
- 积分:1
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rs485_uart
fpga的RS485代码,非常容易,适合学习(the code of rs485 in fpga, very easy,suitable for learning)
- 2019-07-11 14:24:54下载
- 积分:1
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CRC _ Verilog 16
vivado工程下的Verilog语言的CRC_16,并行输入任意字节长度,均可求出来,数据的校验码,代码给的是512个字节宽度的数据源,长度可以自行修改,亲测实际工程~~~
- 2022-01-29 03:28:35下载
- 积分:1
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Fast_median_filter
FPGA数字图像处理实现均值滤波,并且仿真将生成图片写出TXT格式以便使用MATLAB查看(Mean filter is realized by digital image processing in FPGA, and the generated image is written in TXT format for viewing with MATLAB.)
- 2019-06-01 21:23:25下载
- 积分:1
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second7-02
在quartusII环境下采用对编解码芯片HD6408和HD6409驱动的方式实现曼彻斯特编解码(Environment in quartusII codec chip used on the HD6408 and HD6409-driven way to achieve encoding and decoding of Manchester)
- 2020-11-02 10:19:53下载
- 积分:1
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microsemi
说明: microsemi的Libero IDE 软件内部IP核详解(Microsemi's Libero IDE software internal IP kernel details)
- 2021-03-31 10:09:09下载
- 积分:1
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完整SD控制器!支持文件系统。
32-bit Wishbone Interface
• DMA
• Buffer Descriptor
• Compliant with SD Host Controller Spec version 2.0
• Support SD 4-bit mode
• Interrupt-on-completion of Data and Command transmission
• Write/Read FIFO with variable size
• Internal implementation of CRC16 for data lines and CRC7 for command line
Wishbine 总线使用。完整的SD卡控制器,支持文件系统,高速传输。
- 2023-05-06 18:00:02下载
- 积分:1
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arccos
一个求反余弦的cordic算法,整个工程。包括仿真。可以直接打开。(An inverse cosine of the cordic seeking algorithms, the whole project. Including the simulation. Can be directly opened.)
- 2009-11-04 22:48:00下载
- 积分:1