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audio applicaton circuit explain
audio applicaton circuit explain
- 2022-07-07 08:49:14下载
- 积分:1
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光学的文章 英文的 给大家研究与学习 不错的
光学的文章 英文的 给大家研究与学习 不错的-Optical article in English to the U.S. research and learning good
- 2022-03-20 06:17:26下载
- 积分:1
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iec61000_1标准
IEC61000_1 Standards
- 2022-01-26 00:34:29下载
- 积分:1
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机动车辆惯性导航系统
Inertial Navigation System for Mobile Land vehicles
- 2023-03-06 09:30:03下载
- 积分:1
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this is a good guide for optimization using matlab function and also its optimiz...
this a good guide for optimization using matlab function and also its optimization toolbox-this is a good guide for optimization using matlab function and also its optimization toolbox
- 2022-06-30 01:01:05下载
- 积分:1
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可以进行动态重建的酒店平面图的源码下载,欢迎改进。
可以进行动态重建的酒店平面图的源码下载,欢迎改进。-Dynamic reconstruction can
- 2022-07-14 12:38:58下载
- 积分:1
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research development biometrics
research development biometrics
- 2022-03-15 13:53:00下载
- 积分:1
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sbc2440嵌入式Linux开发指南。PDF广州友好的信息…
SBC2440 Embedded Linux Development Guide. Pdf Guangzhou friendliness of the information boom
- 2023-03-30 07:20:03下载
- 积分:1
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Symmetric Architecture Modeling with a Single Image
We present a method to rec...
Symmetric Architecture Modeling with a Single Image
We present a method to recover a 3D texture-mapped architecture
model from a single image. Both single image based modeling and
architecture modeling are challenging problems.
- 2023-07-24 04:55:05下载
- 积分:1
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现代先进微处理器有非常高的集成度和复杂度,又有寄存器堆、Cache等嵌入式部件,而且芯片管脚数相对较少,必须要有一定的自测试设计和其它的可测试性设计来简化测试代...
现代先进微处理器有非常高的集成度和复杂度,又有寄存器堆、Cache等嵌入式部件,而且芯片管脚数相对较少,必须要有一定的自测试设计和其它的可测试性设计来简化测试代码,提高故障覆盖率。本文简要讨论NRS4000微处理器芯片的以边界扫描测试为主体,以自测试为补充的可测试性设计框架。着重介绍芯片的边界扫描设计和芯片中译码控制器PLA和微程序ROM以及采用内嵌RAM结构的指令Cache和寄存器堆的内建自测试设计。仿真结果表明,这些可测试性设计大大缩短了测试代码的长度。-modern microprocessors have a very high degree of integration and complexity, there Register pile, Cache such as embedded components, but Chip few relatively small, There must be the self-test design and testing of other design code to simplify testing, fault coverage. This paper briefly discussed Key words microprocessor chip to the boundary-scan test as the mainstay, Since the test to add to the test design framework. Highlighting the boundary-scan chip design and chip decoder PLA and micro-controller procedures and the use of embedded ROM RA M structure of the instruction cache and register stack of built-in self-test design. The simulation results show that these tests can greatly shorten the design of the test code length.
- 2022-04-01 18:08:40下载
- 积分:1