登录
首页 » VHDL » VHDL

VHDL

于 2022-07-01 发布 文件大小:3.76 MB
0 134
下载积分: 2 下载次数: 1

代码说明:

软件式的VHDL学习工具,能帮助你更好的掌握VHDL的应用-VHDL-based software, learning tools, can help you better grasp the application of VHDL

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • eetop.cn_16bits_multiplier
    16位并行乘法器源代码,booth2编码,二进制树拓扑结构(16bits parallel multiplier source code )
    2020-12-24 20:59:05下载
    积分:1
  • 频率计实验程序代码
    说明:  XC7A35TCSG324-1的Verilog频率计程序,支持十分频,支持切换内外信号输入(Verilog frequency meter program of xc7a35tcsg324-1 supports decadal frequency division and switching internal and external signal input)
    2019-12-24 13:40:45下载
    积分:1
  • USB+FPGA电路设计原理图,实际的电路板运行正常,很有参考意义。...
    USB+FPGA电路设计原理图,实际的电路板运行正常,很有参考意义。-usb_sch
    2022-02-06 23:19:44下载
    积分:1
  • simple code of some kind of base decoder based on verilog
    simple code of some kind of base decoder based on verilog
    2022-01-26 06:31:39下载
    积分:1
  • main
    完整的GMSK调制及维特比译码,程序中包括了高斯滤波器的设计,调制相位的计算,并采用了维特比译码算法解调出原始码元,最后计算了其误码率。(Complete GMSK modulation and Viterbi decoding, the program includes a Gaussian filter design, the calculation of the phase modulation, and uses the Viterbi algorithm demodulates the source element, the final calculation of the bit error rate.)
    2020-11-03 16:19:54下载
    积分:1
  • prj_ex_5
    自动化仿真平台的搭建使用代码,经过具体的仿真和优化,发现代码完全可用(The automated simulation platform is built using code, and after specific simulation and optimization, it is found that the code is fully available)
    2017-09-21 15:11:33下载
    积分:1
  • FIFO
    This is a simple example of FIFO(first in and first out) module written in verilog code(This is a simple example of FIFO (first in and first out) module written in verilog code)
    2013-10-04 00:41:42下载
    积分:1
  • FFT_64points
    64点的 FFT verilog,它是串行计算的,工作频率不到100M,计算速率很高,里面的层次很清晰。(64-point FFT verilog serial computing, the operating frequency of less than 100M, the calculated rate is high, the level inside is very clear.)
    2021-04-03 11:29:07下载
    积分:1
  • piano_final
    ASK,FSK,PSK,DPSK调制解调的详细仿真代码(ASK, FSK, PSK, DPSK modulation and demodulation detailed simulation code)
    2021-02-26 16:49:37下载
    积分:1
  • 为验证系统的Verilog设计
    System Verilog for design verification
    2022-02-11 21:30:00下载
    积分:1
  • 696516资源总数
  • 106571会员总数
  • 2今日下载