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2ASK
2ask调制与解调的源代码，经过测试可用(2ask modulation and demodulation source code is available, tested)
- 2012-12-09 21:27:49下载
- 积分：1
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FPGA-powe-analysis-tool-EPE
FPGA功耗分析工具EPE用于分析FPGA系统的功耗(FPGA power analysis tools EPE is used to analyze the power consumption of the FPGA system)
- 2012-11-19 17:08:00下载
- 积分：1
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FPGA_PSK
可以实现2PSK的信号调制，已经过Modelsim波形仿真(It can realize 2PSK signal modulation and has been simulated by Modelsim waveform.)
- 2019-05-09 16:29:17下载
- 积分：1
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FPGA那些事儿--Modelsim仿真技巧REV6.0
FPGA modelsim 仿真详细说明介绍(Modelsim operation manul, detail expain how to use modelsim)
- 2018-01-02 10:48:28下载
- 积分：1
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arbiter_ip
Arbiter code for simulation purpose
- 2013-07-13 17:45:11下载
- 积分：1
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LCD1602_B
说明： Verilog实现液晶1602显示,学习使用(Verilog LCD1602)
- 2009-08-09 10:57:02下载
- 积分：1
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08_4_hdmi_loop
说明： HDMI做为视频输出输入接口已经广泛使用很长时间，主要通过TMDS差分编码传输。本实验通过在HDMI屏幕上显示彩条和输入输出环通实验，来练习视频的时序和视频颜色的表示，为后面视频处理实验做个基础。(HDMI as video output input interface has been widely used for a long time, mainly through TMDS differential coding transmission. In this experiment, by displaying color bars and input/output loop experiments on HDMI screen, video timing sequence and video color representation are practiced to lay a foundation for video processing experiments later)
- 2020-06-17 09:00:02下载
- 积分：1
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DC-DC
/功 能：1.实现与CPLD的通信,从而控制PWM的占空比. 2.实现LCD显示相关信息.
// 3.实现对键盘按键的判断和确定相应的操作. 4.实现对电压电流的检测.
// 5.实现过载保护功能,电流过大时,切断PWM输出,当排除过流故障后,自动恢复供电
// 6.实现用PID算法跟踪电压,实现稳压输出(/ Function: 1. Achieve communication with the CPLD to control the PWM duty cycle. 2 LCD Display relevant information.// 3. Realize the keyboard keys judgment and determine the appropriate action. 4. Achieve the voltage and current Detection// 5. achieve overload protection, current is too large, cut off the PWM output, when excluding overcurrent fault, automatically restore power// 6. achieve tracking voltage with PID algorithm to achieve the regulated output)
- 2013-05-23 16:28:30下载
- 积分：1
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USB的VERILOG控制代码
这个代码是USB的控制代码，可实现USB的发送与接收数据功能。里面有4个文件，新建一个工程即可编译运行。
- 2023-01-21 05:30:04下载
- 积分：1
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dds(1)
基于DDS的信号发生器设计。DDS,FPGA,Verilog。(Design of signal generator based on DDS.DDS,FPGA,Verilog.)
- 2017-07-11 16:36:38下载
- 积分：1
