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state-machine
一个简单的用verilog实现的售货机状态机设计，内有word介绍设计的原理(A simple realization of a vending machine with verilog state machine design, there are design principles introduced word)
- 2021-01-20 23:48:42下载
- 积分：1
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QAM_FPGA
QAM调制，基于FPGA的实现，包含有乘法器模块、升降余弦滤波器模块、QAM序列生成模块(QAM modulator,the implementation based on FPGA,include MUL、FIRCOS and QAM generate)
- 2021-03-03 01:49:33下载
- 积分：1
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vhdl实现vga接口设计，非常实用的一段代码，学习用
vhdl实现vga接口设计，非常实用的一段代码，学习用-vhdl achieve vga interface design
- 2023-05-25 04:40:03下载
- 积分：1
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StopWatch
This is a simple verilog code for stopwatch undre xlinx ISE webpack based for NEXYS3 board.
- 2013-10-04 00:53:49下载
- 积分：1
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tcdg
Encryption has become a part and parcel of our lives and we have accepted the fact that data is going to encrypted and decrypted at various stages. However, there is not a single encryption algorithm followed everywhere. There are a number of algorithms existing, and I feel there is a need to understand how they work. So this text explains a number of popular encryption algorithms and makes you look at them as mathematical formulas.
- 2014-01-29 15:57:35下载
- 积分：1
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8251的完整的功能的实现,可以进行编译,综合.
8251的完整的功能的实现,可以进行编译,综合.-8251 complete function of the realization can be compiled and integrated.
- 2022-02-25 05:27:00下载
- 积分：1
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USB 1.1 PHY code systemc language USB 1.1 PHY code, systemc languages, including...
USB 1.1 PHY的代码，systemc语言 USB 1.1 PHY的代码，systemc语言,包括基于systemc语言的testbench ，和相关的doc文档-USB 1.1 PHY code systemc language USB 1.1 PHY code, systemc languages, including systemc based testbench language, doc and related documents
- 2022-04-12 00:51:05下载
- 积分：1
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伪随机二进制序列无符号17位计数器
这通过反馈来实现一个 17 位伪随机的无符号计数器异或的位 0 和 3。 注意 ︰ 如果也绝不是独家使用相反，这会反相平行的位模式 & 这将意味着所有位都零是一种有效模式和所有那些不都是有效。 目前所有的都是有效的。
- 2022-12-08 06:25:03下载
- 积分：1
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PCI_arbi
PCI arbi verilog source code
- 2009-03-29 18:04:41下载
- 积分：1
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ref-sdr-sdram-verilog
sdram控制器的开发程序，还有文档，可以参考以下(SDRAM controller development process, there is a document, you can refer to the following)
- 2008-06-13 22:15:41下载
- 积分：1
