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VHDL_modelling_guidelines是vhdl建模开发的指导资料
VHDL_modelling_guidelines是vhdl建模开发的指导资料-VHDL modeling VHDL_modelling_guidelines is guiding the development of information
- 2022-03-12 23:37:10下载
- 积分:1
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counter-with-T_FF
This is counter with T_FF.
- 2016-03-26 16:36:05下载
- 积分:1
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breath
利用verilog写的PWM 程序,来实现产生呼吸灯的效果。(Using xerilog to generate breathing lamp)
- 2020-06-17 04:40:01下载
- 积分:1
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出租车计价器VHDL程序与仿真 的vhdl源代码
出租车计价器VHDL程序与仿真 的vhdl源代码-Taximeter VHDL procedures and simulation vhdl source code
- 2022-03-29 12:46:57下载
- 积分:1
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一个基于FPGA的数字跑表系统的设计,最小单位是百分表位。采用十进制进位。...
一个基于FPGA的数字跑表系统的设计,最小单位是百分表位。采用十进制进位。-FPGA-based digital stopwatch system design, the smallest unit is a digital dial indicator. Binary using the metric system.
- 2023-06-07 08:05:03下载
- 积分:1
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NN-using-FPGA
thesis about design and implementation neural network using FPGA
- 2013-12-29 16:23:52下载
- 积分:1
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Regs
说明: 一个小寄存器堆,使用参数化编程,附有仿真代码,可直接在vivado(2018.2版本及以后)上运行(A small register heap, using parametric programming)
- 2019-04-03 14:19:55下载
- 积分:1
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rs coding vvhdl I do not want to be able to know the specific useful whether you...
rs编码vvhdl 希望能通过 我不晓得具体对大家有用否 希望懂rs编码的多多交流
-rs coding vvhdl I do not want to be able to know the specific useful whether you want to understand a lot of coding rs exchange
- 2022-11-11 05:40:03下载
- 积分:1
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xilinx_usb_drivers_win10_x64
说明: win10的xilinx usb驱动,较新版本(Xilinx USB driver for win10, newer version)
- 2021-03-11 17:09:26下载
- 积分:1
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part1
Altera DE2 开发板试验2 第1部分VHDL答案(Altera DE2 Lab2 part1 VHDL answer)
- 2011-11-17 19:02:19下载
- 积分:1