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vhdl,序列信号发生器,发出11101010,可更改为任意序列
vhdl,序列信号发生器,发出11101010,可更改为任意序列-vhdl, sequence signal generator, issued 11.10101 million, you can change an arbitrary sequence of
- 2023-08-12 03:05:03下载
- 积分:1
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xiaomi
新版 小米抢购器 -源码
已经测试,代码很有用,已经抢了好几个小米3了,希望对大家有用(The new millet to snap up- source
Have test, the code is useful, has robbed several millet 3, hope useful for everyone)
- 2014-01-08 18:26:40下载
- 积分:1
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8051核的vhdl原代码。
8051核的vhdl原代码。-8051 core VHDL source code.
- 2022-04-11 06:02:00下载
- 积分:1
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pngenerator
pngenerator的vhdl代码。我们可以在cdma的fpga实现中使用它;
- 2022-10-01 04:45:03下载
- 积分:1
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waveform-generator-o-VHDL-program
实现4种常见波形正弦、三角、锯齿、方波(A、B)的频率、幅度可控输出(方波
--A的占空比也是可控的),可以存储任意波形特征数据并能重现该波形,还可完成
--各种波形的线形叠加输出。
(Achieve the four kinds of common sine wave, triangle, sawtooth, square wave (A, B) the frequency and amplitude controlled output (square wave- A duty cycle is controlled), can store arbitrary waveform feature data and can to reproduce the waveform, it can perform- all kinds of linear superposition of the output waveform.)
- 2009-10-08 09:56:59下载
- 积分:1
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浮点数运算的FPGA实现,包括仿真文件。
浮点数运算的FPGA实现,包括仿真文件。-FPGA realization of floating-point operations, including the simulation file
- 2022-07-18 19:56:21下载
- 积分:1
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rake
使用matlab实现cdma 系统的rake接收机,比较最大比合并,等增益合并和选择性合并接收算法的性能(脢 鹿 脫脙matlab脢渭脧脰cdma 脧渭脥 鲁 渭脛rake 陆 脫脢脮 禄煤 拢 卢 卤 脠 陆 脧 脳 卯)
- 2021-04-19 14:38:51下载
- 积分:1
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altera公司cycloneII全系列说明书,实用
altera公司cycloneII全系列说明书,实用-altera" s cycloneII a full range of manual, practical
- 2022-02-04 11:53:16下载
- 积分:1
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六个数码码动态扫描接口程序,用VERILOG语言编写的
六个数码码动态扫描接口程序,用VERILOG语言编写的-Six digital code dynamic scan interface program, using Verilog language
- 2022-03-24 21:40:23下载
- 积分:1
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用vhdl描写的通用异步改进dram控制器,经过编译器综合和仿真测试,符合设计要求。...
用vhdl描写的通用异步改进dram控制器,经过编译器综合和仿真测试,符合设计要求。-Using VHDL description Universal Asynchronous improved dram controller, through an integrated compiler and simulation testing, in line with the design requirements.
- 2022-04-19 09:59:57下载
- 积分:1