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用VHDL编写简单的直流电机控制方法.供大家参考.
用VHDL编写简单的直流电机控制方法.供大家参考.-use VHDL to prepare a simple DC motor control methods. For your reference.
- 2022-07-09 16:31:01下载
- 积分：1
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8位十六进制频率计设计 根据频率的定义和频率测量的基本原理，测定信号的频率必须有一个脉宽为1s的输入信号脉冲计数允许信号；1s计数结束后，计数值被锁入锁存器，计...
8位十六进制频率计设计 根据频率的定义和频率测量的基本原理，测定信号的频率必须有一个脉宽为1s的输入信号脉冲计数允许信号；1s计数结束后，计数值被锁入锁存器，计数器清零，为下一测频计数周期做好准备。测频控制信号可由一个独立的发生器（FTCTRL）来产生。-8-bit hexadecimal Cymometer designed in accordance with the definition of frequency and frequency of the basic principles of measurement to determine the frequency of the signal must have a pulse width of the input signal for 1s permit pulse counting signal 1s counting after the total value was locked into the lock depositors, counters cleared for the next count cycle frequency measurement ready. Frequency control signal generator may be an independent (FTCTRL) to generate.
- 2022-06-19 17:20:21下载
- 积分：1
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An_enhanced_security_measures_DSP
通过总结当前对处理器架构的安全性能的处理方法，提出一种增强DSP处理器安全性能的方法。主要从并行性方面进行了改进。最后对改进的方法进行了仿真和结果分析。(By summing up the current security architecture of the processor performance approach, a DSP processor to enhance the safety performance of the method. Mainly from the aspects of parallelism to improve. Finally, improved methods and results of simulation analysis.)
- 2009-03-30 11:18:09下载
- 积分：1
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Polyphase--Filter
多相抽取滤波器。分四相，两倍抽取，采用16阶FIR滤波器实现(Polyphase decimation filters. Divided into four phases, extracted twice using 16-order FIR filter implementation)
- 2020-09-10 15:58:02下载
- 积分：1
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led_water
酷睿系列流水灯通用程序，来回往返流水，点亮led(ledwater for ep2c8q208c8)
- 2017-11-11 00:57:15下载
- 积分：1
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veriloghdllicheng135li
Verilog的应用例程，包含了基本的硬件编程，加法器，触发器(Application of Verilog routines, including the basic hardware programming, adders, flip-flop)
- 2010-12-14 20:38:03下载
- 积分：1
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实现了三种乘法器，可以进行性能比较，比较有较之
实现了三种乘法器，可以进行性能比较，比较有较之-multi
- 2022-08-06 11:47:17下载
- 积分：1
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dds_test
直接数字式频率合成器DDS设计、Verilog。
产生的信号可以是正弦波或方波、三角波、锯齿波等，自选。
采用DDS技术，将所需生成的波形写入ROM中，按照相位累加原理合成任意波形。
此方案得到的波形稳定，精度高，产生波形频率范围大，容易产生高频。
本实验在设计的模块中，包含以下功能：
（1）通过 freq 信号输入需要的频率的值；
（2）通过 wave_sel 信号选择所需的波形；
（3）通过 amp_adj 信号选择波形放大的倍数。(DDS design of direct digital frequency synthesizer, Verilog.
The generated signal can be sinusoidal or square wave, triangular wave, sawtooth wave and so on, optional.
By using DDS technology, the required waveforms are written into ROM, and arbitrary waveforms are synthesized according to the principle of phase accumulation.
The waveform obtained by this scheme is stable, accurate and easy to generate high frequency waveform.
This experiment includes the following functions in the designed module:
(1) Input the required frequency value through freq signal;
(2) Choosing the required waveform by wave_sel signal;
(3) Select the multiplier of waveform amplification by amp_adj signal.)
- 2019-01-19 16:07:50下载
- 积分：1
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免费8051核心上传
Free 8051 core upload
- 2022-02-21 19:18:14下载
- 积分：1
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Traffic_RYG
交通灯的控制，分主干道和从路交通灯，主路优先，正常情况下，绿灯60s，红灯30S，黄灯5S(Traffic light control)
- 2020-06-21 06:40:02下载
- 积分：1
