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VHDL prepared by the FIR filter source for Embedded designers have a good role i...
VHDL语言编写的FIR滤波器源码
对于嵌入式设计者有很好的指导作用
-VHDL prepared by the FIR filter source for Embedded designers have a good role in guiding
- 2022-06-17 20:08:46下载
- 积分:1
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键盘扫描,实现4×4键盘扫描功能,实现在数码管上显示相应的数字...
键盘扫描,实现4×4键盘扫描功能,实现在数码管上显示相应的数字-Keyboard scanning, the realization of 4 × 4 keyboard scan function, the realization of digital tube display in the corresponding figure
- 2022-02-06 05:08:26下载
- 积分:1
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SED1330/1335/1336/E1330液晶显示控制器及51汇编源程序.液晶显示程序,显示图形及汉字....
SED1330/1335/1336/E1330液晶显示控制器及51汇编源程序.液晶显示程序,显示图形及汉字.-SED1330/1335/1336/E1330 LCD controller and the source of 51 Series procedures. LCD procedures, and show pictures of Chinese characters.
- 2022-01-25 22:11:23下载
- 积分:1
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RFID
RFID防碰撞算法的研究,以及对其各种算法的仿真,以及改进算法的仿真和比较。(RFID anti-collision algorithm, as well as its simulation algorithms, and improved simulation and comparison algorithms.)
- 2020-12-03 09:59:25下载
- 积分:1
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ArhivaAdrian
Anticipated Adder for Xilinx
- 2011-11-15 06:57:02下载
- 积分:1
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vhdl数据通路
用于实现fpag-cpu的数据通路源代码。用vhdl编写,包括内存,寄存器组,和alu(简陋的alu,仅包含加法器)三大部分通过手动微指令输入信号,可以往内存写入数据,并加载到寄存器组中,通过alu产生结果,结果保存在一个锁存器中,可以把结果写回寄存器组或者内存。本人在quartus下编写仿真通过。附件中未给出相关工程文件。
- 2023-03-31 14:35:04下载
- 积分:1
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fpga_dk_ps2_vga
ps2 vga interface in vhdl code
- 2011-11-08 11:09:35下载
- 积分:1
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logic lock 的vhdl源码,altera平台适用。
logic lock 的vhdl源码,altera平台适用。-logic lock the VHDL source code, altera platform.
- 2023-01-30 09:50:04下载
- 积分:1
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fir_filter
LOW pass FIR filter for multirate processing
- 2015-02-09 09:59:02下载
- 积分:1
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同步串行数据发送电路SSDT的基本功能是将并行数据转换成串行数据并进行同步发送。系统写入和读出时序完全兼容Intel8086时序。
系统以同步信号开始连续发...
同步串行数据发送电路SSDT的基本功能是将并行数据转换成串行数据并进行同步发送。系统写入和读出时序完全兼容Intel8086时序。
系统以同步信号开始连续发送四个字节,在发送中出现5个1时插入一个0,在四个数据发送结束而下一次同步没有开始之前,发送7FH,这时中间不需要插入零
-synchronous serial data transmission circuit SSDT the basic function is to convert parallel data into serial and the same this step. System write and read sequential fully compatible Intel8086 timing. Synchronized signal system to start sending four consecutive bytes, in this emerging 5 1:00 insert a 0, at the end of four data sent and the next synchronization not started before, sending seven FH, then the middle is not inserted
- 2023-05-29 03:45:03下载
- 积分:1