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dgnszsz
多功能数字钟,在quartusII软件平台上实现的verilog源代码。大家试试看。(Multifunctional digital clock in quartusII software platform to achieve the verilog source code. We try.)
- 2013-09-20 10:20:31下载
- 积分:1
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coubter_key
ISE环境下Verilog编程实现机械按键去抖(ISE Verilog programming environment under mechanical debounces)
- 2015-12-13 12:52:42下载
- 积分:1
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1_ADDER
说明: 第1例到第6例的源描述都是从第8例的程序包中
提取出来的,不能单独编译,这些例子的编译与
模拟请参考第8例.(Example No. 1 to the first six cases are the source described in Example 8 from the first package to extract it and can not be a separate compiler, which compiler and simulation examples please refer to the first eight cases.)
- 2008-09-09 18:00:16下载
- 积分:1
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FPGA60进制数码管显示VHDL代码
FPGA设计中的60进制计数器,通过2个七段数码管系那是出来。代码简单易懂,仿真通过,而且在FPGA开发板上加载显示成功。很有用的入门代码。
- 2022-07-12 13:55:48下载
- 积分:1
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用vhdl来实现的数字频率合成的技术,几乎很全的,所有的都有...
用vhdl来实现的数字频率合成的技术,几乎很全的,所有的都有 -Use VHDL to realize the digital frequency synthesis technology, almost the whole of, all have
- 2022-02-04 17:07:58下载
- 积分:1
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uart_slip
说明: 实现串口通讯以及SLIP协议传输数据,增加了特殊字符的转义(Realization of Serial Communication and SLIP Protocol)
- 2021-01-19 18:58:41下载
- 积分:1
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13.2_MotionDetec
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动检测(System Generator based image processing engineering, multimedia processing on FPGA source code, based on video motion detection)
- 2020-10-23 20:57:22下载
- 积分:1
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n_bit_counter
n bit generic shift registers
- 2011-03-18 17:55:19下载
- 积分:1
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32位二进制除法器2
- 2023-01-06 11:10:03下载
- 积分:1
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GW48
vhdl语言试验箱GW48的各种模式引脚图。。(vhdl language the various modes of chamber GW48 pin map. .)
- 2010-01-20 13:20:28下载
- 积分:1