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JAVA记事本源代码
JAVA记事本源代码 -JAVA source code of Java notebook source code of Java notebook source code
- 2022-08-25 22:13:36下载
- 积分:1
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matlab ASK 实现 16进制的调制与解调
matlab ASK 实现 16进制的调制与解调-matlab ASK 实现 16进制的调制与解调
- 2022-04-02 03:16:28下载
- 积分:1
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考勤机的通讯程序,不知道对大家时候有用!
考勤机的通讯程序,不知道对大家时候有用!-Attendance machine communication procedures, I do not know when useful for everyone!
- 2023-01-07 01:25:04下载
- 积分:1
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一个基于LABVIEW的LCD的显示程序,是可以循环移动的,快来学习吧。...
一个基于LABVIEW的LCD的显示程序,是可以循环移动的,快来学习吧。-LABVIEW-based program the LCD display can cycle mobile, Come learn from it.
- 2022-06-01 05:23:50下载
- 积分:1
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任天堂产品系统文件(chm格式)
对任天堂机各部分的介绍
任天堂产品系统文件(chm格式)
对任天堂机各部分的介绍-Nintendo Product system files (chm format) on the Nintendo machine the various parts of the introduction
- 2022-06-03 15:53:53下载
- 积分:1
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ALTERA上DE2平台,verilog描述,无符号乘法器,在数码管显示结果。...
ALTERA上DE2平台,verilog描述,无符号乘法器,在数码管显示结果。-ALTERA on DE2 platform, verilog description unsigned multiplier, the result will be displayed in the digital pipe.
- 2022-02-11 20:42:23下载
- 积分:1
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This is an extension of sign example. You can design your own traffic sign by us...
This is an extension of sign example. You can design your own traffic sign by using Verilog. And the result from Verilog can be seen by the attached C file.
- 2022-02-24 22:18:42下载
- 积分:1
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一个可综合的verilog描述的GPIO代码。
一个可综合的verilog描述的GPIO代码。-A GPIO design in verilog
- 2022-10-11 07:50:04下载
- 积分:1
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tutorial6 TLM
OSCI组织最新lease出来的传输级建模指导实验,对初学者快速认识TLM中的一些基本概念很有用,本实验经作者修改并调试通过。-The tutorial6 of TLM-2.0 which is released from OSCI group currently!
- 2022-05-05 14:33:38下载
- 积分:1
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The GRLIB IP Library is an integrated set of reusable IP cores, designed for sys...
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip
(SOC) development. The IP cores are centered around a common on-chip bus, and use a coherent
method for simulation and synthesis. The library is vendor independent, with support for different
CAD tools and target technologies. A unique plug&play method is used to configure and connect
the IP cores without the need to modify any global resources.-The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) developmen t. The IP cores are centered around a common on-c hip bus, and use a coherent method for simulation and syn thesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug
- 2022-12-07 22:00:03下载
- 积分:1