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基于FPGA的多功能电子时钟的设计很经典的哦
基于FPGA的多功能电子时钟的设计很经典的哦-FPGA-based multi-functional electronic clock designs are very classic Oh
- 2022-03-21 07:02:37下载
- 积分：1
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Describes the use of FPGA Interface USB interface PDIUSBD12 development flow.
描述了使用FPGA接口PDIUSBD12开发USB接口的流程.-Describes the use of FPGA Interface USB interface PDIUSBD12 development flow.
- 2023-04-29 07:25:03下载
- 积分：1
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help_lib
1.JESD204B协议
2.Xilinx的JESD204B phy 核手册
3.Xilinx的JESD204B rx_tx 核手册7.1
4.Xilinx的JESD204B rx_tx 核手册7.2
5.verilog实现串口发送(1.JESD204B protocol
2.Xilinx JESD204B PHY core manual
3.Xilinx JESD204B rx_tx core manual 7.1
4.Xilinx JESD204B rx_tx core manual 7.2
5.verilog to achieve serial transmission)
- 2017-11-15 16:09:22下载
- 积分：1
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Encoder_SSI_Veryilog
说明： 本文详细描述了SSI协议的通讯格式、原理及应用电路,并采用verilog语言实现了SSI通讯协议.设计实用电路并实现了与绝对值编码器的通讯(SSI protocol described in detail the communication format, principle and application circuit, and use verilog language of the SSI protocol. Practical circuit design and implementation of the communication with the absolute encoder)
- 2020-12-28 20:59:02下载
- 积分：1
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the-decoding-algorithm-of-ldpc
ldpc译码算法介绍及fpga verilog系统方案设计，包括log_bp算法、min_sum算法、scaling_min_sum算法等(introducing the ldpc code decoding algorithm and the related system design，including the log_bp,the min_sum and the scaling_min_sum)
- 2012-02-22 10:31:41下载
- 积分：1
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C4gx15_starter_qsys_pcie_gen1x1
PCIe demo sample code
- 2020-12-09 16:39:19下载
- 积分：1
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EPM570
非常好的EPM570(CPLD)学习程序源码,适合初学者,能让其快速入门(Very good EPM570 (CPLD) learning program source code, suitable for beginners, allowing its Quick Start)
- 2013-09-11 10:18:59下载
- 积分：1
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zedboard
xilinx的zed板详细开发资料，对初学者和开发人员都有帮助(The Xilinx zed board detailed development information, helpful for beginners and developers)
- 2013-04-22 16:44:31下载
- 积分：1
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VHDL 2008 A reference book on VHDL
VHDL 2008 A reference book on VHDL-VHDL 2008 A reference book on VHDL
- 2022-02-07 15:24:00下载
- 积分：1
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color_bar
彩条产生程序。。。。720p需添加74.25M时钟(colorbar generation. need 74.25mhz clock if 720p gen)
- 2020-06-22 06:20:01下载
- 积分：1
