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网络通信间编解码通用模块设计文档,可以参照设计自己的格式...
网络通信间编解码通用模块设计文档,可以参照设计自己的格式-network communication between codecs common module design document, reference design their own format
- 2022-07-09 04:08:52下载
- 积分：1
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A simple communication documents, requests for service by writing this open with...
一个通信的简单文件,请求服务用.........用写字本打开-A simple communication documents, requests for service by writing this open with .........
- 2022-03-22 23:59:15下载
- 积分：1
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Matlab做图像处理的课件，讲得很明了
Matlab做图像处理的课件，讲得很明了-Matlab Image Processing Software, made it very clear
- 2022-10-06 04:00:03下载
- 积分：1
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芯片集成电路材料
Microchip Ic material
PIC18Fxx60-Microchip Ic material PIC18Fxx60
- 2022-03-18 17:55:26下载
- 积分：1
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基于MFC的INI配置文件的读写
基于MFC的INI配置文件的读写,自己写的INI文件的操作实例,ini是一个配置文件，可以用来保存软件的一些设置，可控下一次读取数据时方便使用！
- 2022-03-12 01:27:04下载
- 积分：1
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With the motion control system Punta neck development, can combine the PC platfo...
随着运动控制系统的蓬脖发展，由于可以结合PC平台进行二次开发，故其数据来源逐渐由手工输入或教导，转向兼容大量绘图软件所生成的图形图像文件。如：CorlDraw，AutoCAD，MasterCAM，Pro/E等工具。-With the motion control system Punta neck development, can combine the PC platform as a result of secondary development, it gradually from its source of data entered manually or taught, steering compatible mapping software generated a large number of graphics image files. Such as: CorlDraw, AutoCAD, MasterCAM, Pro/E and other tools.
- 2023-01-01 03:05:04下载
- 积分：1
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阿拉伯布局
我对阿拉伯文排版的总结，对要做阿拉伯文排版的，应该很有帮助！-Arabic layout
- 2022-08-06 20:22:10下载
- 积分：1
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Joseph Wan, the hash table, banking simulation system for the subject data struc...
Joseph环,哈希表,银行业务模拟系统为题目的数据结构课程设计。有详细的文字说明和源代码。-Joseph Wan, the hash table, banking simulation system for the subject data structure course design. A detailed written instructions and source code.
- 2022-07-17 19:26:27下载
- 积分：1
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pass the pass word
pass the pass word-pass the pass password
- 2022-08-15 10:39:09下载
- 积分：1
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华为,大规模逻辑设计指导书,规格详细，包括：VHDL编写规范，Verilog编写规范，asic设计方法，同步电路设计规则，vhdl电路设计，代码可重用设计，...
华为,大规模逻辑设计指导书,规格详细，包括：VHDL编写规范，Verilog编写规范，asic设计方法，同步电路设计规则，vhdl电路设计，代码可重用设计，-Huawei, a large-scale logic design guide books, detailed specifications, including: VHDL specification preparation, Verilog specification preparation, asic design, synchronous circuit design rules, vhdl circuit design, reusable code design,
- 2022-02-14 13:11:48下载
- 积分：1
