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sysgen_gs
Xilinx system generator
- 2020-12-25 15:39:04下载
- 积分：1
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Implement the 7 segment diplay on spartan 3
Implement the 7 segment diplay on spartan 3
- 2022-02-10 04:28:00下载
- 积分：1
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VHDL
带有异步清零、异步置位功能的边沿JK触发器(With asynchronous reset, asynchronous setting function of edge JK flip-flop)
- 2020-06-30 03:00:02下载
- 积分：1
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dlx.tar
these is about code for dlx processor
- 2010-03-15 17:52:53下载
- 积分：1
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elevator
verilog语言写的一个四层电梯程序，有优先级的判断。(verilog language of a four-story elevator procedures to determine priority.)
- 2020-10-31 14:29:55下载
- 积分：1
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VHDLDesignandFPGAImplementationofLDPCDecode
说明： 一篇关于LDPC解码算法的FPGA用VHDL实现的PDF文件，老外写的，还可以，可以参考，欢迎大家下载！(A PDF about the FPGA implementation of LDPC algorithm, written by foreigners, but also, you can refer to, welcome to download!)
- 2020-03-23 20:33:51下载
- 积分：1
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DE2_115_TV
DE2-115开发板TV摄像头成像程序，源码亲测可用，可加入边缘算法成像，实时显示轮廓，速度流畅(The DE2-115 development board TV camera imaging procedures, the pro-test in the source can be added to the edge algorithms imaging, real-time display contours, fast-paced)
- 2020-07-09 19:18:55下载
- 积分：1
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ModelSim-gaojishiyong--Camp
FPGA开发仿真工具modelsim的高级进阶教程，包括如何写脚本文件和后台批处理文件(FPGA Development Advanced simulation tools modelsim tutorial, including how to write a script file and back-office batch file)
- 2012-05-09 23:52:21下载
- 积分：1
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usb控制器，有VHDL实现的，还有C++的源码，可以编译
usb控制器，有VHDL实现的，还有C++的源码，可以编译-usb controller, there is the realization of VHDL, as well as C++ source code can be compiled
- 2022-03-31 17:48:55下载
- 积分：1
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verilog
lap of altera . it s basic about verilog
- 2010-06-25 20:30:32下载
- 积分：1
