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我的学习经验,一种自适应分频及分频方法的实现,很好用的哦...
我的学习经验,一种自适应分频及分频方法的实现,很好用的哦-my learning experience, an adaptive frequency-frequency method and the realization of the good, oh
- 2022-02-03 01:08:00下载
- 积分:1
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com1027soft
FSK/MSK/GFSK/GMSK
DIGITAL DEMODULATOR
VHDL SOURCE CODE OVERVIEW
- 2011-03-21 22:41:15下载
- 积分:1
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SystemC-UART
基于SystemC的Uart模型-----文档(SystemC the Uart model of----- document)
- 2013-01-24 16:41:35下载
- 积分:1
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VHDL参考例程
VHDL参考例程--日如DAC0832接口电路程序-VHDL reference routines- on procedures such as the DAC0832 Interface Circuit
- 2022-03-23 11:58:49下载
- 积分:1
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UART_DMA
UART_DMA的方法是使用nios实现UART方式实现DMA传输,在硬件平台上通过验证实现(UART_DMA way is to use uart dma transfer nios implemented in the hardware platform validated by)
- 2020-11-03 10:39:53下载
- 积分:1
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chenxu
电子时钟,可以显示四位,两位显示分钟,两位显示秒,可以用按键控制清零,以及加减数(Electronic clock, you can display four bit, two bit display minutes, the second display seconds, can be used to control the key to clear, and the addition of subtraction)
- 2017-04-22 21:29:14下载
- 积分:1
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emmc
emmc协议的实现代码,包含了SD协议,usb实现协议(The implementation code of EMMC protocol)
- 2021-04-08 16:39:00下载
- 积分:1
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用VHDL语言编写的AT24C02程序,并用数码管显示,本程序已经经过本人测试过,很好用...
用VHDL语言编写的AT24C02程序,并用数码管显示,本程序已经经过本人测试过,很好用-The AT24C02 is available VHDL language program, and use digital tube display, this procedure has been tested himself, very good to use--
- 2022-04-22 03:40:31下载
- 积分:1
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Verilog_add_div_multi_exp
使用verilog写的32位浮点数加法模块、浮点数乘法模块、浮点数除法模块、浮点数指数模块。指数模块是综合前面三个例化成泰勒级数求指数,迭代次数(可设置)决定了精度。(Use verilog write 32-bit floating-point addition module, floating-point multiplication module, floating-point division module, the floating point number index module.Index module is a comprehensive index of the front three cases into Taylor series for calculating index, the number of iterations can be set to determine the precision)
- 2020-12-18 09:49:10下载
- 积分:1
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hdb3_codedecode
说明: 用VERILOG实现的,hdb3编码器和解码器,经过前仿真和后仿真成功(Achieved with the VERILOG, hdb3 encoder and decoder, after a successful pre-simulation and post simulation)
- 2021-04-22 15:58:49下载
- 积分:1