登录
首页 » Verilog » 基于Verilog的32位CRC校验

基于Verilog的32位CRC校验

于 2022-08-11 发布 文件大小:133.42 kB
0 115
下载积分: 2 下载次数: 1

代码说明:

基于Verilog语言的8位数据32位校验码,本模块以一次读取256个数据为例,循环产生32位校验码,对数据进行校验,反校验时,读取校验256位数据后在对产生的32位校验码取反校验,会产生一个32位crc校验的固定数据

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • I2C
    一种能简单的实现I2C通讯的代码,对于主机和从机之间的通讯讲解的很清楚。(A Code for I2C Communication)
    2020-06-18 23:20:02下载
    积分:1
  • pci_fpga
    对pci9054芯片的配置进行了设置,并对PCI9054的各状态机进行了设置,程序经过了测试(Pci9054 chip on the configuration of the set, and each state machine PCI9054 been set, the program have been tested)
    2013-10-12 11:39:45下载
    积分:1
  • OFDM-Verilog
    基于FPGA的OFDM的实现,Verilog语言。(OFDM based on FPGA,by Verilog)
    2021-02-03 20:59:58下载
    积分:1
  • ADC
    AD转换的Matlab程序,将输入电压转换成时间(脉冲宽度信号)或频率(脉冲频率),然后由定时器/计数器获得数字值(AD conversion of the Matlab program, the input voltage is converted into a time (pulse width signal) or a frequency (pulse frequency), and then to obtain a digital value by the timer/counter)
    2012-12-18 11:01:40下载
    积分:1
  • Uart2Sdram2TFT_median_filter
    说明:  使用FPGA实现中值滤波算法,能够使数据直接使用该系统对数据进行中值滤波。(FPGA is used to realize the median filtering algorithm, which can make the data directly use the system for median filtering.)
    2019-12-30 21:27:58下载
    积分:1
  • msp430x41x
    低电源电压范围为1.8 V至3.6 V 超低功耗: - 主动模式:280μA,在1 MHz,2.2伏 - 待机模式:1.1μA - 关闭模式(RAM保持):0.1μA 五省电模式 欠待机模式唤醒 超过6微秒 16位RISC架构, 125 ns指令周期时间 12位A/ D转换器具有内部 参考,采样和保持,并 AutoScan功能 16位Timer_B随着三† 或七‡ 捕捉/比较随着阴影寄存器 具有三个16位定时器A 捕捉/比较寄存器 片上比较器 串行通信接口(USART), 选择异步UART或 同步SPI软件: - 两个USART(USART0 USART1)的† - 一个USART(USART0)‡ 掉电检测 电源电压监控器/监视器 可编程电平检测 串行板载编程, 无需外部编程电压 安全可编程代码保护 融合(Low Supply-Voltage Range, 1.8 V to 3.6 V Ultralow-Power Consumption: − Active Mode: 280 µ A at 1 MHz, 2.2 V − Standby Mode: 1.1 µ A − Off Mode (RAM Retention): 0.1 µ A Five Power Saving Modes Wake-Up From Standby Mode in Less Than 6 µ s 16-Bit RISC Architecture, 125-ns Instruction Cycle Time 12-Bit A/D Converter With Internal Reference, Sample-and-Hold and Autoscan Feature 16-Bit Timer_B With Three† or Seven‡ Capture/Compare-With-Shadow Registers 16-Bit Timer_A With Three Capture/Compare Registers On-Chip Comparator Serial Communication Interface (USART), Select Asynchronous UART or Synchronous SPI by Software: − Two USARTs (USART0, USART1)† − One USART (USART0)‡ Brownout Detector Supply Voltage Supervisor/Monitor With Programmable Level Detection Serial Onboard Programming, No External Programming Voltage Needed Programmable Code Protection by Security Fuse)
    2012-05-31 15:26:33下载
    积分:1
  • ioRWTest
    C6000系列之6701开发板相关文件及说明(C6000 Series of 6701 development board-related documents and notes)
    2008-04-17 17:08:58下载
    积分:1
  • 硬件仿真
    说明:  基于FPGA的QPSK系统仿真及验证,硬件部分。(Simulation and verification of QPSK system based on FPGA)
    2021-02-06 16:21:17下载
    积分:1
  • 系统设计
    基于PCF8591数模转换和DDS技术的信号发生器系统设计(Design of Signal Generator System Based on PCF8591 Digital-to-Analog Conversion and DDS Technology)
    2020-06-21 02:20:01下载
    积分:1
  • 手把手教你学FPGA 仿真篇
    手把手教你学FPGA 仿真篇,简单实用。(Hand in hand teach you to learn FPGA simulation, simple and practical.)
    2018-07-09 21:25:09下载
    积分:1
  • 696518资源总数
  • 106215会员总数
  • 5今日下载