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HDB3_encoder_QuartusPrj
说明： HDB3编码Quartus2 10.0的工程，modelsim仿真，有实物图、仿真图以及源程序，适合做通信原理课程设计的同学参考使用(HDB3 encoding Quartus2 10.0 project, modelsim simulation, there are physical map, simulation diagrams and source code, suitable for students of communication theory courses designed for reference use)
- 2011-03-25 08:35:32下载
- 积分：1
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Frame-synchronization
FPGA 帧同步源代码 调试无错误 ALTERA 平台(Frame synchronization
FPGA)
- 2011-06-21 10:41:22下载
- 积分：1
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cpldfpga
《CPLDFPGA嵌入式应用开发技术白金手册》源代码，涉及FPGA/CPLD的各个方面，键盘扫描，LED扫描等简单程序及滤波器等的设计(" CPLDFPGA platinum embedded application development technology handbook" source code, related to FPGA/CPLD all aspects of the keyboard scanning, LED scanning filters, such as simple procedures and design)
- 2009-04-20 20:59:16下载
- 积分：1
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dpll
说明： 在quartus下搭建的数字锁相环，能实现频率自动跟踪。(The digital phase-locked loop built under quartus can realize automatic frequency tracking.)
- 2020-06-21 01:00:02下载
- 积分：1
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61EDA_D888
基于Verilog HDL出租车计费系统的研制(Based on Verilog HDL Taxi Accounting System)
- 2010-01-07 18:30:10下载
- 积分：1
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ytupn
Very suitable for the study using computer vision, Analysis of the signal time domain, frequency domain, cepstrum, cyclic spectrum, etc. The performance of the program has reached a high level.
- 2017-09-02 18:07:13下载
- 积分：1
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LATTICE_ASYNFIFO
LATTICE FPGA FIFO 程序例程，工程详细，全部源代码上传 (LATTICE FPGA FIFO routine, detailed engineering, all source code uploaded)
- 2013-09-09 11:10:01下载
- 积分：1
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UART_TX
说明： fpga串口的接收程序基于verilog语言拿走不用谢。(The receiving program of FPGA serial port is based on Verilog language.)
- 2020-06-18 03:20:02下载
- 积分：1
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steper motor
stepper motor module on spartan 6 and 24MHz clock fequency
- 2019-03-10 15:44:31下载
- 积分：1
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MCU2FPGA_SPI_TB
本程序使用Verilog语言实现了SPI接口的设计，可以直接烧到FPGA实现与MCU的通信,自带有测试文件。(The program uses the Verilog language design SPI interface, you can burn directly communicate with the FPGA, MCU, comes with a test file.)
- 2021-02-26 10:29:37下载
- 积分：1
