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PC9054_1124
基于FPGA的PCI9054 LOCALBUS总线接口(PCI9054 interface program based on FPGA)
- 2015-04-07 09:44:02下载
- 积分:1
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a cycle ruduandency code
实现一个循环冗余码,是老师给的例子,别的同学已经验证-a cycle ruduandency code
- 2023-04-27 23:30:03下载
- 积分:1
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gundong
说明: 通过按键输入学号,并循环显示:
电路功能描述:通过Ego1上的按键输入自己的学号(8位10进制数),并存储在32位的寄存器中;8位10进制数输入完成后,实现滚动显示效果。(Enter the student number by pressing the key, and display it in a cycle:
Circuit function description: input one's own student number (8-digit decimal number) through the key on ego1, and store it in 32-bit register; after the completion of 8-digit decimal number input, the scrolling display effect is realized.)
- 2020-12-19 16:09:10下载
- 积分:1
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fft_ex1
基于verilog的FFT设计,使用vivado作为开发平台(Verilog based on the FFT design, the use of vivado as a development platform)
- 2021-02-24 23:39:39下载
- 积分:1
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VHDL basic computing, the use of 8bit for the multiplier, will be the value of t...
VHDL基本运算,采用8位为乘法器,将两个8位字符串的值输入相乘后
- 2023-07-23 02:35:07下载
- 积分:1
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基于fpga的实时视频采集与显示
高速化 小型化
基于fpga的实时视频采集与显示
高速化 小型化-fpga
- 2022-01-30 23:55:32下载
- 积分:1
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为验证系统的Verilog设计
System Verilog for design verification
- 2022-02-11 21:30:00下载
- 积分:1
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A basic SDH transmission module STM
一个SDH中最基本传输模块STM-1的帧头检测器,verilog编程实现-A basic SDH transmission module STM-1 Header detector, verilog Programming
- 2022-02-07 03:42:51下载
- 积分:1
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VHDL-TESTBENCH
VHDL TESTBENCH书写规范,对学习FPGA的同学很有帮助,掌握仿真语言书写规范。(VHDL TESTBENCH description of the norms, the students learn FPGA helpful, master the language of simulation techniques)
- 2016-12-15 21:33:24下载
- 积分:1
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I do view on the VHDL design options for the CPLD or FPGA to achieve HDB3 code
我上期做的VHDL设计方案,用于在FPGA或CPLD中实现HDB3的编码-I do view on the VHDL design options for the CPLD or FPGA to achieve HDB3 code
- 2022-10-15 14:00:02下载
- 积分:1