本文描述的是数字式频率计的设计过程,其中包含了所用到的VHDl语言的源代码,和仿真图型,是比较完整描述的设计数字频率计的文章-This article describes the digital frequency of the design process, which includes the use of language VHDl source code, graphics and simulation, which is a more complete description of the design of digital frequency meter article
内含有: 1.系统窗体模块组成 2.数据模块窗体设置 3.主窗体功能模块的实现 4.入库、出库窗体模块的实现 5. 查询功能的实现-contain : 1. Window system comprising two modules. Data Form installed three modules. The main forms of functional modules to achieve 4. Arsenal and out forms for the realization of five modules. The realization of the inquiry