-
20190717
uart documentation, july 17, 2019. the document describes the basics of verilog programming and how to implement them on an fpga device
- 2020-06-21 21:40:01下载
- 积分:1
-
facman
一款在Verilog实现的吃豆人游戏,采用VGA接口,在Nexys3开发板上运行无误。(A pac-man game implemented via Verilog, using VGA interface, perfectly run on Nexys 3)
- 2021-03-31 07:39:09下载
- 积分:1
-
pidd
verilog实现增量式PID算法,实测可用,带modelsim仿真(PID algorithm by verilog)
- 2017-10-20 19:26:34下载
- 积分:1
-
PipelineCPU
Quartus II 7.2环境中,采用硬件描述语言VHDL独立完成了基于MIPS指令集的32位RISC处理器的逻辑设计(quartusII mips pipeline 32bit cpu design)
- 2010-05-26 16:51:42下载
- 积分:1
-
8层电梯FPGA控制系统
基于FPGA XILINX平台实现8层电梯的控制系统设计,编程语言为verilog,IDE平台为VIVADO。
该代码实用,可以提供参考。系统采用模块化设计,方便代码移植、集成,代码的激励文件测试需要自己编写一下,比较简单
- 2022-02-01 05:17:29下载
- 积分:1
-
8b10b Verilog
采用verilog语言基于查找表描述8b10b编码源代码(Using Verilog language to describe 8B10B encoding source code based on look-up table)
- 2021-01-27 14:58:41下载
- 积分:1
-
decode_64_66
自编的64B/66B解码程序,做毕业设计的时候写的。(The decoding process 64B/66B , written when i am in the school。)
- 2020-10-16 10:07:29下载
- 积分:1
-
nand flash控制器的设计
- 2022-11-20 17:00:03下载
- 积分:1
-
multi_booth
基于quartus的布斯乘法器的verilog 实现。布斯乘法算法是计算机中一种利用数的2的补码形式来计算乘法的算法。该算法由安德鲁·唐纳德·布斯于1950 年发明,当时他在伦敦大学伯克贝克学院做晶体学研究。布斯曾使用过台式计算器,由于用这种计算器来做移位计算比加法快,他发明了该算法来加快计算速度。(The verilog codes of booth multiplier based on quartus. Booth multiplication algorithm is a computer algorithm using the complement form of number 2 to calculate the multiplication. The algorithm was invented in 1950 by Andrew Donald booth, who was working on crystallography at birkbeck college, university of London. Booth used a desktop calculator, and because it was faster to do shifts than to add, he invented the algorithm to speed up the calculations.)
- 2019-01-06 10:03:08下载
- 积分:1
-
ff_const_mul
说明: 常系数有限域乘法器,verilog DHL源码(Constant coefficient finite field multiplier, verilog DHL source)
- 2011-02-19 21:09:36下载
- 积分:1