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FPGA-design-and-application
已经正式出版,西安电子科技大学出版社,FPGA设计及应用,作者褚振勇(Has been officially published, Xi' an University of Electronic Science and Technology Publishing House, FPGA design and application, the author Zhezhengyong)
- 2009-06-03 15:57:31下载
- 积分:1
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HwLog10
用verilog写的,基于查表法实现的LOG10运算器,在Altera FPGA中应用。(It is a verilog design of LOG10 calculation unit, which is based on LUT arithmatic. And it is applicated in Altera FPGA.)
- 2021-04-07 15:59:01下载
- 积分:1
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cpu_easy
ADD MOV MOVi SUB四指令cpu设计,qutartus,(Design of four-instruction CPU)
- 2019-05-13 11:44:49下载
- 积分:1
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spi_master_sent
在FPGA平台实现SPI传输协议开发,SPI为三总线式。(Implementation of SPI transmission protocol development on FPGA platform)
- 2020-08-02 08:18:35下载
- 积分:1
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256M_sdram_OK
改自特权同学verilog语言写sdram测试程序;支持256M内存(verilog sdram )
- 2013-12-23 16:15:43下载
- 积分:1
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Frame-synchronization
FPGA 帧同步源代码 调试无错误 ALTERA 平台(Frame synchronization
FPGA)
- 2011-06-21 10:41:22下载
- 积分:1
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Mano-CPU_VHDL-Implementation
Mano s cpu for Man s instructions
- 2012-04-28 01:04:57下载
- 积分:1
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计数器的 vhdl 代码
我们使用此代码开发 plc 在 fpga 硬件计数器的程序
- 2023-02-08 13:05:03下载
- 积分:1
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PC
说明: Verilog HDL语言编写的32位程序计数器(PC)完整工程及相应仿真,QuartusII7.2下编译通过可正常使用。(Complete engineering and simulation of Verilog HDL language of the 32-bit program counter (PC), QuartusII7.2 compiled through normal use.)
- 2012-09-06 09:07:47下载
- 积分:1
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sdh_pointer_deal
文件描述的是SDH 指针处理和系统同步代码 veriolg(SDH pointer processing and system synchronization code veriolg of file Description)
- 2012-09-07 16:17:40下载
- 积分:1