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QPSK_1
QPSK调制,QPSK仿真误码率,QPSK理论误码率 , QPSK仿真误比特率 , QPSK理论误比特率 (QPSK modulation, the signal-to-noise ratio)
- 2020-12-06 19:29:22下载
- 积分:1
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Xilinx CPLD源代码,使用XC9500系列CPLD,驱动液晶
Xilinx CPLD源代码,使用XC9500系列CPLD,驱动液晶-Xilinx CPLD source code, use the XC9500 series CPLD, LCD Driver
- 2023-03-07 15:05:03下载
- 积分:1
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example16-dac7512-sina-wave-ok
VHDL 基于cpld EPM570的DA转换代码(VHDL CPLD EPM570 the DA conversion code based on)
- 2014-12-08 14:02:34下载
- 积分:1
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shift_split_data
关于一个串行数据输入 根据时序将数据分两路输出的程序 (on a serial data input timing will be based on output data using two procedures)
- 2006-07-04 09:40:55下载
- 积分:1
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uart
uart通信的Verilog实现,包含rx tx 以及testbench(Verilog implemention of UART telecommunicate)
- 2018-09-18 17:06:06下载
- 积分:1
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altera的关于对数计算的IP core。
altera的关于对数计算的IP core。-altera calculated on the logarithm of the IP core.
- 2022-09-17 13:25:03下载
- 积分:1
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niossram
altera fpga ep3c25器件微处理器开发,niosii+sram, 已编译通过,可直接下载到开发板(altera fpga ep3c25 the development of microprocessor devices, niosii+ sram, compiled through, can be directly downloaded to the development board)
- 2009-04-13 13:26:42下载
- 积分:1
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jiaotongdeng
Quartus2环境下基于VHDL状态机的交通灯程序(VHDL state machine traffic lights based on Quartus2 environment)
- 2014-01-13 21:57:00下载
- 积分:1
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通用存储器VHDL代码库,The Free IP Project VHDL Free
通用存储器VHDL代码库,The Free IP Project VHDL Free-FIFO, Quartus standard library.
-generic VHDL code for memory, The Free Project VHDL IP Free-FIFO, Quartus standard library.
- 2022-05-26 21:22:15下载
- 积分:1
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利用FPGA采集按键,加了消斗。其实跟单片机的效果差不多。
利用FPGA采集按键,加了消斗。其实跟单片机的效果差不多。-The use of FPGA collect keys, plus the elimination fighting. In fact, almost with the effect of SCM.
- 2023-03-12 23:10:03下载
- 积分:1