-
making a simple clock using altera vhdl
making a simple clock using altera vhdl
- 2022-04-16 21:53:47下载
- 积分:1
-
chuankou_huihuan
FPGA与PC端实现串口数据的收发,先从PC端接收数据,然后发回给电脑,可通过串口助手验证。(The serial port data is sent and received between the FPGA and the PC. First, the data is received from the PC, and then sent back to the computer. It can be verified by the serial port assistant.)
- 2020-06-16 10:20:01下载
- 积分:1
-
a vhdl_program used for flat detect
平坦度检测中的高度检测算法,使用ISE开发环境,语言为VHDL,平台是XC3S4-a vhdl_program used for flat detect
- 2022-01-27 09:06:50下载
- 积分:1
-
S05_example_Network
说明: vivado lwip 应用文档 基于zynq 7020(vivado lwip example text of zynq)
- 2020-06-17 11:40:02下载
- 积分:1
-
busok
高频卡读写原理及技术编程应用--卡的读取,写入。(High-frequency card reader technology)
- 2011-07-19 11:16:22下载
- 积分:1
-
waveform_-generator
简易信号波形发生器,可以产生四种波形,频率1k-20K步进可调。学习Verilog HDL的好例子。(imple signal waveform generator, can produce four waveform, frequency 1 k-20 k step can be adjusted. Learning Verilog good example of HDL.
)
- 2011-06-12 21:13:27下载
- 积分:1
-
EMI
说明: Simetrix EMI滤波器设计,实际测试有效果。(Simetrix EMI filter design, the actual test results are effective.)
- 2019-10-01 22:28:37下载
- 积分:1
-
divider
用VERILOG实现一个被除数为8位、除数为4位的高效除法器(With VERILOG implement a dividend for the 8-bit, 4-bit effective divisor divider)
- 2020-11-19 11:39:37下载
- 积分:1
-
阅读FPGA的SRAM中,然后通过对几个CY7C68013
FPGA读SRAM中的数再传给CY7C68013-Reading SRAM in the FPGA, then pass on a few CY7C68013
- 2023-07-28 03:05:04下载
- 积分:1
-
uart_tx
FPGA实现串口发送 Verilog 语言(Serial reception FPGA Verilog language.)
- 2015-11-11 13:26:49下载
- 积分:1