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4-to-1
4选1数据选择器,有使能端控制,4个数据输入,2个地址端,1个输出(4 1 data selector, enable end control, four data inputs, two addresses end, an output)
- 2012-10-15 18:48:38下载
- 积分:1
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OFDM_TX_CR802.11-master
OFDM_TX_CR802.11-master 802.11协议 ofdm开发(OFDM_TX_CR802.11-master)
- 2018-11-15 17:03:03下载
- 积分:1
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Shumaguan
在BASYS3上实现跑马灯的功能。第一LED交替闪烁;第二LED由左至右逐个变亮,再逐个变暗;第三LED由右至左逐个变亮,再逐个变暗;第四LED由两边逐个变亮,再从中间逐个变暗。(Realize the function of the horse light on BASYS3. The first LED flashes alternately; second LED brightens from left to right and then darkens one by one; the third LED turns from right to left, then darkens one by one, and then darkens one by one; fourth LED is brightened by both sides, and then darkening from the middle.)
- 2018-06-21 11:06:16下载
- 积分:1
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alu
说明: VHDL实现的算术逻辑计算单元(ALU),包括modersim测试文件,即仿真结果。(VHDL implementation of the arithmetic logic calculation unit (ALU), including modersim test file, the simulation results.)
- 2011-03-26 21:18:01下载
- 积分:1
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实现LMS的VHDL代码。
Implement LMS vhdl code.
- 2022-07-11 07:46:06下载
- 积分:1
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cpu
cache,实现了部分简单指令,仿真模拟确认可行(Single-cycle CPU, to achieve some simple instruction, simulation confirm feasible)
- 2015-01-05 14:11:10下载
- 积分:1
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24_Timer
说明: 使用Verilog编写的24位定时器,具有apb 总线接口,可以设置工作方式和计数初值。(The 24-bit timer written by Verilog has APB bus interface, which can set working mode and count initial value.)
- 2021-04-27 21:38:44下载
- 积分:1
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AD9826
AD9826中文说明书 ,对于学习AD9826元件有很大的帮助。(AD9826 Discription in Chinese)
- 2015-04-12 14:22:34下载
- 积分:1
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ADC VHDL 代码
使用VHDI Dispaly字符。显示了一个模拟的正常工作的LCD控制器硬件实现。这种模拟演示了不同的状态机协同工作的方式。作为初始化序列完成时,主状态机的命令的状态开始。
- 2022-02-24 19:19:54下载
- 积分:1
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CH2CH1VHDL 数字电路参考书所有程序3
CH2CH1VHDL 数字电路参考书所有程序3-CH2CH1VHDL digital circuit reference all three procedures
- 2022-05-29 17:53:40下载
- 积分:1