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CHING
数字钟vhdl主要分为正常显示与报时功能(Digital clock vhdl)
- 2013-03-06 15:32:11下载
- 积分:1
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LQ091B1LW01 TFT LCD Spartan-6 FPGA driver
This is a demo for TFT LCD LQ091B1LW01(Sharp 9.1inch, 822 X 260) with Spartan-6 FPGA.
- 2022-04-08 12:43:13下载
- 积分:1
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17_walsh_128
walsh码,在CDMA系统中经常使用到的方法,在quartusII环境下实现的。(walsh code in the CDMA system, the method often used in quartusII environment to achieve.)
- 2020-07-03 09:00:02下载
- 积分:1
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基于basys3的推箱子游戏
基于FPGA的游戏实例,开发板为Xilinx的basys3,VGA显示(Basys3, VGA Display of Xilinx Development Board Based on Game Example of FPGA)
- 2021-03-12 13:09:25下载
- 积分:1
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视频编解码lamda计算
视频编解码设计中会有涉及到图像操作代价的计算,其中通用算法lamda的计算是一个可以模块化设计的模块,代码就是实现这个功能而设计的。
- 2022-10-24 23:30:03下载
- 积分:1
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BCH3
BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)
- 2021-01-26 11:58:36下载
- 积分:1
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verilog_curr_design
说明: 实现中采用 Verilog HDL 描述、 ModelSim 进行功能仿真、 Quartus II 进行逻辑综合和适配下载(Design of table tennis game machine)
- 2020-07-16 21:49:36下载
- 积分:1
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uart_vivado
说明: UART 收发模块,可移植,编程平台为vivado(uart communication transceiver module, portable)
- 2020-10-17 13:33:10下载
- 积分:1
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Dual-Mode-Dual-Band-Filters
本文介绍一种波导双模双带滤波器的设计方法。(This paper presents a new class of dual-mode dualband
filters in which each polarization is dedicated to a selected
band. The equivalent circuit is a parallel combination of two inline
networks that represent each polarization. A transmission zero is
generated between the two bands by properly adjusting the relative
orientations of the input and output coupling apertures.)
- 2013-03-12 18:08:33下载
- 积分:1
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ov5640驱动代码
ov5640的驱动代码,包括寄存器初始化,cmos图像的捕获,ddr内存的驱动,LCD驱动等。
- 2022-04-30 23:32:42下载
- 积分:1